/ * @brief * Get the LFnCLK frequency based on current configuration. * * @param[in] lfClkBranch * LF branch, 0 = LFA, 1 = LFB, ... * * @return * The LFnCLK frequency in Hz. If no LFnCLK is selected (disabled), 0 is * returned. ******************************************************************************/
| 346 | * returned. |
| 347 | ******************************************************************************/ |
| 348 | static uint32_t CMU_LFClkGet(unsigned int lfClkBranch) |
| 349 | { |
| 350 | uint32_t ret; |
| 351 | |
| 352 | EFM_ASSERT(lfClkBranch == CMU_LFA || lfClkBranch == CMU_LFB); |
| 353 | |
| 354 | switch ((CMU->LFCLKSEL >> (lfClkBranch * 2)) & 0x3) |
| 355 | { |
| 356 | case _CMU_LFCLKSEL_LFA_LFRCO: |
| 357 | ret = SystemLFRCOClockGet(); |
| 358 | break; |
| 359 | |
| 360 | case _CMU_LFCLKSEL_LFA_LFXO: |
| 361 | ret = SystemLFXOClockGet(); |
| 362 | break; |
| 363 | |
| 364 | case _CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2: |
| 365 | #if defined (_EFM32_GIANT_FAMILY) |
| 366 | /* Giant Gecko can use a /4 divider (and must if >32MHz) or HFLE is set */ |
| 367 | if(((CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKLEDIV_MASK) == CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV4)|| |
| 368 | (CMU->CTRL & CMU_CTRL_HFLE)) |
| 369 | { |
| 370 | ret = SystemCoreClockGet() / 4; |
| 371 | } |
| 372 | else |
| 373 | { |
| 374 | ret = SystemCoreClockGet() / 2; |
| 375 | } |
| 376 | #else |
| 377 | ret = SystemCoreClockGet() / 2; |
| 378 | #endif |
| 379 | break; |
| 380 | |
| 381 | case _CMU_LFCLKSEL_LFA_DISABLED: |
| 382 | #if defined (_EFM32_GIANT_FAMILY) || defined (_EFM32_TINY_FAMILY) |
| 383 | /* Check LF Extended bit setting for ULFRCO clock */ |
| 384 | if(CMU->LFCLKSEL >> (_CMU_LFCLKSEL_LFAE_SHIFT + lfClkBranch * 4)) |
| 385 | { |
| 386 | ret = SystemULFRCOClockGet(); |
| 387 | } |
| 388 | else |
| 389 | { |
| 390 | ret = 0; |
| 391 | } |
| 392 | #else |
| 393 | ret = 0; |
| 394 | #endif |
| 395 | break; |
| 396 | |
| 397 | default: |
| 398 | ret = 0; |
| 399 | break; |
| 400 | } |
| 401 | |
| 402 | return ret; |
| 403 | } |
| 404 | |
| 405 |
no test coverage detected