/ * @brief Initialize BURTC * * @details * Configures the BURTC peripheral. * * @note * Before initialization, BURTC module must first be enabled by clearing the * reset bit in the RMU, i.e. * @verbatim * RMU_ResetControl(rmuResetBU, false); * @endverbatim * Compare channel 0 must be configured outside this function, before * initialization if enable is set to true. The co
| 99 | * Pointer to BURTC initialization structure |
| 100 | ******************************************************************************/ |
| 101 | void BURTC_Init(const BURTC_Init_TypeDef *burtcInit) |
| 102 | { |
| 103 | uint32_t ctrl; |
| 104 | uint32_t presc; |
| 105 | |
| 106 | /* Check initializer structure integrity */ |
| 107 | EFM_ASSERT(burtcInit != (BURTC_Init_TypeDef *) 0); |
| 108 | /* Clock divider must be between 1 and 128, really on the form 2^n */ |
| 109 | EFM_ASSERT((burtcInit->clkDiv >= 1) && (burtcInit->clkDiv <= 128)); |
| 110 | /* Ignored compare bits during low power operation must be less than 7 */ |
| 111 | /* Note! Giant Gecko revision C errata, do NOT use LPCOMP=7 */ |
| 112 | EFM_ASSERT(burtcInit->lowPowerComp <= 6); |
| 113 | /* You cannot enable the BURTC if mode is set to disabled */ |
| 114 | EFM_ASSERT((burtcInit->enable == false) || |
| 115 | ((burtcInit->enable == true) && (burtcInit->mode != burtcModeDisable))); |
| 116 | /* Low power mode is only available with LFRCO or LFXO as clock source */ |
| 117 | EFM_ASSERT((burtcInit->clkSel != burtcClkSelULFRCO) || |
| 118 | ((burtcInit->clkSel == burtcClkSelULFRCO) && (burtcInit->lowPowerMode == burtcLPDisable))); |
| 119 | |
| 120 | /* Calculate prescaler value from clock divider input */ |
| 121 | /* Note! If clock select (clkSel) is ULFRCO, a non-zero clkDiv will select */ |
| 122 | /* 1kHz clock source, while any other value will use a 2kHz ULFRCO clock */ |
| 123 | presc = BURTC_DivToLog2(burtcInit->clkDiv); |
| 124 | |
| 125 | /* Make sure all registers are updated simultaneously */ |
| 126 | if (burtcInit->enable) |
| 127 | { |
| 128 | BURTC_FreezeEnable(true); |
| 129 | } |
| 130 | |
| 131 | /* Configure low power mode */ |
| 132 | BURTC->LPMODE = (uint32_t)(burtcInit->lowPowerMode); |
| 133 | |
| 134 | /* New configuration */ |
| 135 | ctrl = ((BURTC_CTRL_RSTEN) | |
| 136 | (burtcInit->mode) | |
| 137 | (burtcInit->debugRun << _BURTC_CTRL_DEBUGRUN_SHIFT) | |
| 138 | (burtcInit->compare0Top << _BURTC_CTRL_COMP0TOP_SHIFT) | |
| 139 | (burtcInit->lowPowerComp << _BURTC_CTRL_LPCOMP_SHIFT) | |
| 140 | (presc << _BURTC_CTRL_PRESC_SHIFT) | |
| 141 | (burtcInit->clkSel) | |
| 142 | (burtcInit->timeStamp << _BURTC_CTRL_BUMODETSEN_SHIFT)); |
| 143 | |
| 144 | /* Clear interrupts */ |
| 145 | BURTC->IFC = 0xFFFFFFFF; |
| 146 | |
| 147 | /* Set new configuration */ |
| 148 | BURTC->CTRL = ctrl; |
| 149 | |
| 150 | /* Enable BURTC and counter */ |
| 151 | if (burtcInit->enable) |
| 152 | { |
| 153 | /* To enable BURTC counter, we need to disable reset */ |
| 154 | BURTC_Enable(true); |
| 155 | |
| 156 | /* Clear freeze */ |
| 157 | BURTC_FreezeEnable(false); |
| 158 |
nothing calls this directly
no test coverage detected