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hub / github.com/RT-Thread/rt-thread / designware_eth_send

Function designware_eth_send

bsp/cvitek/drivers/libraries/eth/dw_eth_mac.c:339–414  ·  view source on GitHub ↗

Source from the content-addressed store, hash-verified

337}
338
339static int32_t designware_eth_send(eth_mac_handle_t handle, const uint8_t *frame, uint32_t length)
340{
341 gmac_dev_t *mac_dev = (gmac_dev_t *)handle;
342 struct dw_gmac_priv *priv = mac_dev->priv;
343 struct dw_gmac_dma_regs *dma_reg = mac_dev->priv->dma_regs_p;
344 uint32_t desc_num = priv->tx_currdescnum;
345 struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
346 uint64_t desc_start = (uint64_t)desc_p;
347 uint64_t desc_end = desc_start + roundup(sizeof(*desc_p), DW_GMAC_DMA_ALIGN);
348 uint64_t data_start = (uint64_t)DRV_IOREMAP((void *)desc_p->dmamac_addr, 0x1000);
349 uint64_t data_end = data_start + roundup(length, DW_GMAC_DMA_ALIGN);
350 uint32_t count = 0;
351
352 /*
353 * Strictly we only need to invalidate the "txrx_status" field
354 * for the following check, but on some platforms we cannot
355 * invalidate only 4 bytes, so we flush the entire descriptor,
356 * which is 16 bytes in total. This is safe because the
357 * individual descriptors in the array are each aligned to
358 * DW_GMAC_DMA_ALIGN and padded appropriately.
359 */
360
361 /* Check if the descriptor is owned by CPU */
362 while (1)
363 {
364 rt_hw_cpu_dcache_invalidate((void *)desc_start, desc_end - desc_start);
365 if (!(desc_p->txrx_status & CVI_DESC_TXSTS_OWNBYDMA))
366 {
367 break;
368 }
369
370 if (count > 1000)
371 {
372 rt_kprintf("desc onwer is DMA\n");
373 return -1;
374 }
375 count ++;
376 rt_thread_mdelay(1);
377 }
378
379 memcpy((void *)data_start, frame, length);
380
381 /* Flush data to be sent */
382 rt_hw_cpu_dcache_clean((void *)data_start, data_end - data_start);
383
384#if defined(CONFIG_DW_ALTDESCRIPTOR)
385 desc_p->txrx_status |= CVI_DESC_TXSTS_TXFIRST | CVI_DESC_TXSTS_TXLAST;
386 desc_p->dmamac_cntl &= ~CVI_DESC_TXCTRL_SIZE1MASK;
387 desc_p->dmamac_cntl |= (length << CVI_DESC_TXCTRL_SIZE1SHFT) &
388 CVI_DESC_TXCTRL_SIZE1MASK;
389
390 desc_p->txrx_status &= ~(CVI_DESC_TXSTS_MSK);
391 desc_p->txrx_status |= CVI_DESC_TXSTS_OWNBYDMA;
392#else
393 desc_p->dmamac_cntl &= ~CVI_DESC_TXCTRL_SIZE1MASK;
394 desc_p->dmamac_cntl |= ((length << CVI_DESC_TXCTRL_SIZE1SHFT) &
395 CVI_DESC_TXCTRL_SIZE1MASK) | CVI_DESC_TXCTRL_TXLAST |
396 CVI_DESC_TXCTRL_TXFIRST;

Callers 1

cvi_eth_mac_send_frameFunction · 0.85

Calls 4

rt_kprintfFunction · 0.85
rt_thread_mdelayFunction · 0.85
rt_hw_cpu_dcache_cleanFunction · 0.50

Tested by

no test coverage detected