| 414 | } |
| 415 | |
| 416 | static int32_t designware_eth_recv(eth_mac_handle_t handle, uint8_t **packetp) |
| 417 | { |
| 418 | gmac_dev_t *mac_dev = (gmac_dev_t *)handle; |
| 419 | struct dw_gmac_priv *priv = mac_dev->priv; |
| 420 | uint32_t status, desc_num = priv->rx_currdescnum; |
| 421 | struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num]; |
| 422 | int32_t length = -1; |
| 423 | uint64_t desc_start = (uint64_t)desc_p; |
| 424 | uint64_t desc_end = desc_start + roundup(sizeof(*desc_p), DW_GMAC_DMA_ALIGN); |
| 425 | uint64_t data_start = (uint64_t)DRV_IOREMAP((void *)desc_p->dmamac_addr, 0x1000); |
| 426 | uint64_t data_end; |
| 427 | |
| 428 | /* Invalidate entire buffer descriptor */ |
| 429 | rt_hw_cpu_dcache_invalidate((void *)desc_start, desc_end - desc_start); |
| 430 | status = desc_p->txrx_status; |
| 431 | /* Check if the owner is the CPU */ |
| 432 | if (!(status & CVI_DESC_RXSTS_OWNBYDMA)) |
| 433 | { |
| 434 | length = (status & CVI_DESC_RXSTS_FRMLENMSK) >> CVI_DESC_RXSTS_FRMLENSHFT; |
| 435 | |
| 436 | /* Invalidate received data */ |
| 437 | data_end = data_start + roundup(length, DW_GMAC_DMA_ALIGN); |
| 438 | |
| 439 | rt_hw_cpu_dcache_invalidate((void *)data_start, data_end - data_start); |
| 440 | *packetp = (uint8_t *)data_start; |
| 441 | } |
| 442 | |
| 443 | return length; |
| 444 | } |
| 445 | |
| 446 | static int32_t designware_free_pkt(eth_mac_handle_t handle) |
| 447 | { |
no test coverage detected