| 72 | } |
| 73 | |
| 74 | static int cvi_eth_mac_phy_enable(uint32_t enable) |
| 75 | { |
| 76 | eth_mac_addr_t addr; |
| 77 | int32_t ret; |
| 78 | |
| 79 | if ((g_mac_phy_init_finish == 0) && enable) |
| 80 | { |
| 81 | /* startup mac */ |
| 82 | ret = cvi_eth_mac_control(g_mac_handle, CSI_ETH_MAC_CONFIGURE, 1); |
| 83 | if (ret != 0) |
| 84 | { |
| 85 | LOG_E("Failed to control mac"); |
| 86 | return -1; |
| 87 | } |
| 88 | |
| 89 | /* Start up the PHY */ |
| 90 | ret = cvi_eth_phy_power_control(g_phy_handle, CSI_ETH_POWER_FULL); |
| 91 | if (ret != 0) |
| 92 | { |
| 93 | LOG_E("Failed to control phy, ret:0x%d", ret); |
| 94 | return -1; |
| 95 | } |
| 96 | } |
| 97 | |
| 98 | /* enable mac TX/RX */ |
| 99 | ret = cvi_eth_mac_control(g_mac_handle, CSI_ETH_MAC_CONTROL_TX, enable ? 1 : 0); |
| 100 | if (ret != 0) |
| 101 | { |
| 102 | LOG_E("Failed to enable mac TX"); |
| 103 | return ret; |
| 104 | } |
| 105 | |
| 106 | ret = cvi_eth_mac_control(g_mac_handle, CSI_ETH_MAC_CONTROL_RX, enable ? 1 : 0); |
| 107 | if (ret != 0) |
| 108 | { |
| 109 | LOG_E("Failed to enable mac RX"); |
| 110 | return ret; |
| 111 | } |
| 112 | |
| 113 | /* set mac address */ |
| 114 | rt_memcpy(addr.b, g_mac_addr, sizeof(g_mac_addr)); |
| 115 | ret = cvi_eth_mac_set_macaddr(g_mac_handle, &addr); |
| 116 | if (ret != 0) |
| 117 | { |
| 118 | LOG_E("Failed to set mac address"); |
| 119 | return -1; |
| 120 | } |
| 121 | |
| 122 | /* adjust mac link parameter */ |
| 123 | ret = cvi_eth_mac_control(g_mac_handle, DRV_ETH_MAC_ADJUST_LINK, 1); |
| 124 | if (ret != 0) |
| 125 | { |
| 126 | LOG_E("Failed to adjust link"); |
| 127 | return -1; |
| 128 | } |
| 129 | |
| 130 | return 0; |
| 131 | } |
no test coverage detected