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Function configure

bsp/at32/libraries/rt_drivers/drv_spi.c:121–250  ·  view source on GitHub ↗

Source from the content-addressed store, hash-verified

119}
120
121static rt_err_t configure(struct rt_spi_device* device,
122 struct rt_spi_configuration* configuration)
123{
124 struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus;
125 struct at32_spi *instance = (struct at32_spi *)spi_bus->parent.user_data;
126
127 spi_init_type spi_init_struct;
128
129 RT_ASSERT(device != RT_NULL);
130 RT_ASSERT(configuration != RT_NULL);
131
132 at32_msp_spi_init(instance->config->spi_x);
133
134 /* data_width */
135 if(configuration->data_width <= 8)
136 {
137 spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
138 }
139 else if(configuration->data_width <= 16)
140 {
141 spi_init_struct.frame_bit_num = SPI_FRAME_16BIT;
142 }
143 else
144 {
145 return -RT_EIO;
146 }
147
148 /* baudrate */
149 {
150 uint32_t spi_apb_clock;
151 uint32_t max_hz;
152 crm_clocks_freq_type clocks_struct;
153
154 max_hz = configuration->max_hz;
155
156 crm_clocks_freq_get(&clocks_struct);
157 LOG_D("sys freq: %d\n", clocks_struct.sclk_freq);
158 LOG_D("max freq: %d\n", max_hz);
159
160 if (instance->config->spi_x == SPI1)
161 {
162 spi_apb_clock = clocks_struct.apb2_freq;
163 LOG_D("pclk2 freq: %d\n", clocks_struct.apb2_freq);
164 }
165 else
166 {
167 spi_apb_clock = clocks_struct.apb1_freq;
168 LOG_D("pclk1 freq: %d\n", clocks_struct.apb1_freq);
169 }
170
171 if(max_hz >= (spi_apb_clock / 2))
172 {
173 spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_2;
174 }
175 else if (max_hz >= (spi_apb_clock / 4))
176 {
177 spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_4;
178 }

Callers

nothing calls this directly

Calls 3

at32_msp_spi_initFunction · 0.50
spi_enableFunction · 0.50
spi_initFunction · 0.50

Tested by

no test coverage detected