| 473 | } |
| 474 | |
| 475 | static void uart_set_format(uart_port_t uart_port, uint8_t data_bits, uint8_t stop_bits, uint8_t parity) |
| 476 | { |
| 477 | size_t uart_base; |
| 478 | uint8_t lcr; |
| 479 | |
| 480 | uart_base = SUNXI_UART0_BASE + uart_port * 0x400; |
| 481 | |
| 482 | lcr = hal_readb(uart_base + UART_LCR); |
| 483 | |
| 484 | /* set word length */ |
| 485 | lcr &= ~(UART_LCR_DLEN_MASK); |
| 486 | switch (data_bits) |
| 487 | { |
| 488 | case 5: |
| 489 | lcr |= UART_LCR_WLEN5; |
| 490 | break; |
| 491 | case 6: |
| 492 | lcr |= UART_LCR_WLEN6; |
| 493 | break; |
| 494 | case 7: |
| 495 | lcr |= UART_LCR_WLEN7; |
| 496 | break; |
| 497 | case 8: |
| 498 | default: |
| 499 | lcr |= UART_LCR_WLEN8; |
| 500 | break; |
| 501 | } |
| 502 | |
| 503 | /* set stop bit */ |
| 504 | switch (stop_bits) |
| 505 | { |
| 506 | case 1: |
| 507 | default: |
| 508 | lcr &= ~(UART_LCR_STOP); |
| 509 | break; |
| 510 | case 2: |
| 511 | lcr |= UART_LCR_STOP; |
| 512 | break; |
| 513 | } |
| 514 | |
| 515 | /* set parity bit */ |
| 516 | lcr &= ~(UART_LCR_PARITY_MASK); |
| 517 | switch (parity) |
| 518 | { |
| 519 | case PARITY_NONE: |
| 520 | lcr &= ~(UART_LCR_PARITY); |
| 521 | break; |
| 522 | case PARITY_ODD: |
| 523 | lcr |= UART_LCR_PARITY; |
| 524 | break; |
| 525 | case PARITY_EVEN: |
| 526 | lcr |= UART_LCR_PARITY; |
| 527 | lcr |= UART_LCR_EPAR; |
| 528 | break; |
| 529 | } |
| 530 | |
| 531 | hal_writeb(lcr, uart_base + UART_LCR); |
| 532 | } |
no outgoing calls
no test coverage detected