* @brief I2C abort callback. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information

* @brief I2S error callbacks * @param hi2s pointer to a I2S_HandleTypeDef structure that contains * the configuration information for I2

* @brief Rx Transfer completed callbacks * @param hi2s pointer to a I2S_HandleTypeDef structure that contains * the configuration inform

* @brief Tx Transfer completed callbacks * @param hi2s pointer to a I2S_HandleTypeDef structure that contains * the configuration inform

* @brief Rx Transfer complete callback. * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains * the configurati

* @brief Tx Transfer complete callback. * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains * the configurati

* @brief Rx Transfer completed callbacks * @param hmmc: Pointer MMC handle * @retval None */

* @brief Tx Transfer completed callbacks * @param hmmc: Pointer to MMC handle * @retval None */

* @brief Enables a device specific interrupt in the NVIC interrupt controller. * @note To configure interrupts priority correctly, the NVIC_Prior

* @brief Abort an USB EP transaction. * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */

* @brief USB Reset callback. * @param hpcd PCD handle * @retval None */

* @brief Resume event callback. * @param hpcd PCD handle * @retval None */

* @brief USB Start Of Frame callback. * @param hpcd PCD handle * @retval None */

* @brief Setup stage callback * @param hpcd PCD handle * @retval None */

* @brief Suspend event callback. * @param hpcd PCD handle * @retval None */

* @brief Waits until the RTC registers (RTC_CNT, RTC_ALR and RTC_PRL) * are synchronized with RTC APB clock. * @note This function must be ca

* @brief Rx Transfer completed callbacks * @param hsd: Pointer SD handle * @retval None */

* @brief Tx Transfer completed callbacks * @param hsd: Pointer to SD handle * @retval None */

* @brief Rx Transfer completed callback * @param hsc Pointer to a SMARTCARD_HandleTypeDef structure that contains * the configu

* @brief Tx Transfer completed callback. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration

* @brief Tx and Rx Transfer completed callback. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configu

* @brief DMA transfer complete callback. * @param hdma pointer to a SRAM_HandleTypeDef structure that contains * the configuratio

* @brief Hall commutation changed callback in non-blocking mode * @param htim TIM handle * @retval None */

* @brief Timer error callback in non-blocking mode * @param htim TIM handle * @retval None */

* @brief Period elapsed callback in non-blocking mode * @param htim TIM handle * @retval None */

* @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */

* @brief Rx Transfer completed callbacks. * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configura

* @brief Tx Transfer completed callbacks. * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configura

* @brief Tx Transfer completed callbacks. * @param husart Pointer to a USART_HandleTypeDef structure that contains * the configur

* @brief I2C data register flush process. * @param hi2c I2C handle. * @retval None */

* @brief Handle TXE and BTF flag for Memory transmitter * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the confi

* @brief Master sends target device address followed by internal memory address for write request. * @param hi2c Pointer to a I2C_HandleTypeDef st

* @brief This function handles I2C Communication Timeout for specific usage of BTF flag. * @param hi2c Pointer to a I2C_HandleTypeDef structure th

* @brief End ongoing Tx transfer on IRDA peripheral (following error detection or Transmit completion). * @param hirda IRDA handle. * @retval No

* @brief Receives an amount of data in non blocking mode. * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains *

Disable interrupt.

Enable interrupt.

Get interrupt pending flag.

Get interrupt priority.

Register interrupt handler.

Configure interrupt request mode.

Set interrupt pending flag.

* @brief Set ADC group regular sequence: channel on the selected * scan sequence rank. * @note This function performs configuration of:

* @brief Set sampling time of the selected ADC channel * Unit: ADC clock cycles. * @note On this device, sampling time is on channel sc

* @brief Set Number of data to transfer. * @note This action has no effect if * channel is enabled. * @rmtoll CNDTR NDT

* @brief Set the Memory address. * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only

* @brief Set the Peripheral address. * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH

* @brief Disable ExtiLine Event request for Lines in range 0 to 31 * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31 * @param ExtiLi

* @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 * @note The reset value for the direct or internal lines (see RM) *

* @brief Enable ExtiLine Event request for Lines in range 0 to 31 * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31 * @param ExtiLine

* @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 * @note The configurable wakeup lines are edge-triggered. No glitch must b

* @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 * @note The reset value for the direct or internal lines (see RM) * i

* @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 * @note The configurable wakeup lines are edge-triggered. No glitch must be

* @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct. * @param EXTI_InitStruct pointer to a @ref LL_EXT

* @brief Get FLASH Latency * @rmtoll FLASH_ACR LATENCY LL_FLASH_GetLatency * @retval Returned value can be one of the following values:

* @brief Get the FLASH Status * @retval LL Status */

* @brief Set FLASH Latency * @rmtoll FLASH_ACR LATENCY LL_FLASH_SetLatency * @param Latency This parameter can be one of the following

* @brief Configure source input for the EXTI external interrupt. * @rmtoll AFIO_EXTICR1 EXTIx LL_GPIO_AF_SetEXTISource\n * A

* @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port. * @note Warning: only one pin can be passed as parameter.

* @brief Toggle data value for several pin of dedicated port. * @rmtoll ODR ODy LL_GPIO_TogglePin * @param GPIOx GPIO Port

* @brief Get AHB prescaler * @rmtoll CFGR HPRE LL_RCC_GetAHBPrescaler * @retval Returned value can be one of the following value

* @brief Enable HSE crystal oscillator (HSE ON) * @rmtoll CR HSEON LL_RCC_HSE_Enable * @retval None */

* @brief Get PREDIV2 division factor * @rmtoll CFGR2 PREDIV2 LL_RCC_HSE_GetPrediv2 * @retval Returned value can be one of the follow

* @brief Enable HSI oscillator * @rmtoll CR HSION LL_RCC_HSI_Enable * @retval None */

* @brief Check if PLL2 Ready * @rmtoll CR PLL2RDY LL_RCC_PLL2_IsReady * @retval State of bit (1 or 0). */

* @brief Enable PLL * @rmtoll CR PLLON LL_RCC_PLL_Enable * @retval None */

* @brief Get the oscillator used as PLL clock source. * @rmtoll CFGR PLLSRC LL_RCC_PLL_GetMainSource\n * CFGR2 PRED

* @brief Get PREDIV1 division factor for the main PLL * @note They can be written only when the PLL is disabled * @rmtoll CFGR2 PREDIV1

* @brief Set AHB prescaler * @rmtoll CFGR HPRE LL_RCC_SetAHBPrescaler * @param Prescaler This parameter can be one of the follo

* @brief Set APB1 prescaler * @rmtoll CFGR PPRE1 LL_RCC_SetAPB1Prescaler * @param Prescaler This parameter can be one of the fol

* @brief Set APB2 prescaler * @rmtoll CFGR PPRE2 LL_RCC_SetAPB2Prescaler * @param Prescaler This parameter can be one of the fol

* @brief Clear Registers synchronization flag * @rmtoll CRL RSF LL_RTC_ClearFlag_RS * @param RTCx RTC Instance * @retval No

* @brief Disable the write protection for RTC registers. * @rmtoll CRL RTC_CRL_CNF LL_RTC_DisableWriteProtection * @param RTC

* @brief Get Registers synchronization flag * @rmtoll CRL RSF LL_RTC_IsActiveFlag_RS * @param RTCx RTC Instance * @retval S

* @brief Waits until the RTC registers are synchronized with RTC APB clock. * @note The RTC Resynchronization mode is write protected, use the

* @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct. * @note As some bits in SPI configuration register

* @brief Write 8-Bits in the data register * @rmtoll DR DR LL_SPI_TransmitData8 * @param SPIx SPI Instance * @param TxDa

* @brief This function sets directly SystemCoreClock CMSIS variable. * @note Variable can be calculated also through SystemCoreClockUpdate functi

* @brief Disable fast mode for the output channel. * @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n * CCMR1 OC2FE

* @brief Enable compare register (TIMx_CCRx) preload for the output channel. * @rmtoll CCMR1 OC1PE LL_TIM_OC_EnablePreload\n *

* @brief Configure the TIMx output channel. * @param TIMx Timer Instance * @param Channel This parameter can be one of the following values:

* @brief Set compare value for output channel 2 (TIMx_CCR2). * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not *

* @brief Check if the USART Transmission Complete Flag is set or not * @rmtoll SR TC LL_USART_IsActiveFlag_TC * @param USAR

* @brief Indicate if USART is enabled * @rmtoll CR1 UE LL_USART_IsEnabled * @param USARTx USART Instance * @retval State o

* @brief Configure USART BRR register for achieving expected Baud Rate value. * @note Compute and set USARTDIV value in BRR Register (full BRR co

* @brief Reads extended CSD register to get the sectors number of the device * @param hmmc: Pointer to MMC handle * @param pFieldData: Pointer

\brief Set 4k/64k page access privileges \param [out] descriptor_l2 L2 descriptor. \param [in] user User Level Access: NO_ACCE

\brief Set 4k/64k page domain \param [out] descriptor_l1 L1 descriptor. \param [in] domain Page domain \return 0 */

\brief Set 4k/64k page Global attribute \param [out] descriptor_l2 L2 descriptor. \param [in] g_bit 4k/64k page attribute: GLOB

\brief Set 4k/64k page memory attributes \param [out] descriptor_l2 L2 descriptor. \param [in] mem 4k/64k page memory type: N

\brief Set Section memory attributes \param [out] descriptor_l1 L1 descriptor. \param [in] mem Section memory type: NORMAL, D

\brief Set 4k/64k page parity check \param [out] descriptor_l1 L1 descriptor. \param [in] p_bit Parity check: ECC_DISABLED, ECC

\brief Set 4k/64k page Security attribute \param [out] descriptor_l1 L1 descriptor. \param [in] s_bit 4k/64k page Security attr

\brief Set 4k/64k page shareability \param [out] descriptor_l2 L2 descriptor. \param [in] s_bit 4k/64k page shareability: NON_S

Page 4k or 64k */ \brief Set 4k/64k page execution-never attribute \param [out] descriptor_l2 L2 descriptor. \param [in] xn

I2C1 init function */

* @brief 更新数字页面标签动画 * * @param dp 数字页面指针 * @param label_index 标签索引 * @param dir 运动方向 */