| 13 | #endif |
| 14 | |
| 15 | static void enableInterrupt(uint8_t num) |
| 16 | { |
| 17 | switch (DESCRAMBLE_INT_ORDER(num)) { |
| 18 | #if defined(EICRA) && defined(EIMSK) |
| 19 | case 0: |
| 20 | EICRA = (EICRA & 0xFC) | 0x01; |
| 21 | EIMSK |= 0x01; |
| 22 | return; |
| 23 | case 1: |
| 24 | EICRA = (EICRA & 0xF3) | 0x04; |
| 25 | EIMSK |= 0x02; |
| 26 | return; |
| 27 | case 2: |
| 28 | EICRA = (EICRA & 0xCF) | 0x10; |
| 29 | EIMSK |= 0x04; |
| 30 | return; |
| 31 | case 3: |
| 32 | EICRA = (EICRA & 0x3F) | 0x40; |
| 33 | EIMSK |= 0x08; |
| 34 | return; |
| 35 | #elif defined(MCUCR) && defined(GICR) |
| 36 | case 0: |
| 37 | MCUCR = (MCUCR & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00); |
| 38 | GICR |= (1 << INT0); |
| 39 | return; |
| 40 | case 1: |
| 41 | MCUCR = (MCUCR & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10); |
| 42 | GICR |= (1 << INT1); |
| 43 | return; |
| 44 | #elif defined(MCUCR) && defined(GIMSK) |
| 45 | case 0: |
| 46 | MCUCR = (MCUCR & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00); |
| 47 | GIMSK |= (1 << INT0); |
| 48 | return; |
| 49 | case 1: |
| 50 | MCUCR = (MCUCR & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10); |
| 51 | GIMSK |= (1 << INT1); |
| 52 | return; |
| 53 | #endif |
| 54 | #if defined(EICRB) && defined(EIMSK) |
| 55 | case 4: |
| 56 | EICRB = (EICRB & 0xFC) | 0x01; |
| 57 | EIMSK |= 0x10; |
| 58 | return; |
| 59 | case 5: |
| 60 | EICRB = (EICRB & 0xF3) | 0x04; |
| 61 | EIMSK |= 0x20; |
| 62 | return; |
| 63 | case 6: |
| 64 | EICRB = (EICRB & 0xCF) | 0x10; |
| 65 | EIMSK |= 0x40; |
| 66 | return; |
| 67 | case 7: |
| 68 | EICRB = (EICRB & 0x3F) | 0x40; |
| 69 | EIMSK |= 0x80; |
| 70 | return; |
| 71 | #endif |
| 72 | } |
nothing calls this directly
no outgoing calls
no test coverage detected