| 753 | |
| 754 | template <typename T> |
| 755 | void TensorToVector(const DenseTensor& src, |
| 756 | const phi::DeviceContext& ctx, |
| 757 | std::vector<T>* dst) { |
| 758 | auto src_ptr = static_cast<const void*>(src.data<T>()); |
| 759 | auto size = src.numel() * sizeof(T); |
| 760 | |
| 761 | phi::CPUPlace dst_place{}; |
| 762 | dst->resize(src.numel()); |
| 763 | auto dst_ptr = static_cast<void*>(dst->data()); |
| 764 | |
| 765 | if (src.place().GetType() == AllocationType::CPU) { |
| 766 | memory_utils::Copy(dst_place, dst_ptr, src.place(), src_ptr, size); |
| 767 | } |
| 768 | #if defined(PADDLE_WITH_CUDA) || defined(PADDLE_WITH_HIP) |
| 769 | else if (src.place().GetType() == AllocationType::GPU) { // NOLINT |
| 770 | memory_utils::Copy(dst_place, |
| 771 | dst_ptr, |
| 772 | src.place(), |
| 773 | src_ptr, |
| 774 | size, |
| 775 | reinterpret_cast<const phi::GPUContext&>(ctx).stream()); |
| 776 | } |
| 777 | #endif |
| 778 | #if defined(PADDLE_WITH_XPU) |
| 779 | else if (src.place().GetType() == AllocationType::XPU) { // NOLINT |
| 780 | memory_utils::Copy(dst_place, dst_ptr, src.place(), src_ptr, size); |
| 781 | } |
| 782 | #endif |
| 783 | #ifdef PADDLE_WITH_CUSTOM_DEVICE |
| 784 | else if (src.place().GetType() == AllocationType::CUSTOM) { // NOLINT |
| 785 | memory_utils::Copy(dst_place, dst_ptr, src.place(), src_ptr, size, nullptr); |
| 786 | } |
| 787 | #endif |
| 788 | else { // NOLINT |
| 789 | PADDLE_THROW(common::errors::Unimplemented( |
| 790 | "TensorToVector on %s is not supported.", src.place())); |
| 791 | } |
| 792 | } |
| 793 | |
| 794 | template <> |
| 795 | void TensorToVector(const DenseTensor& src, |