\internal * Queries and returns the cache sizes in Bytes of the L1, L2, and L3 data caches respectively */
| 918 | /** \internal |
| 919 | * Queries and returns the cache sizes in Bytes of the L1, L2, and L3 data caches respectively */ |
| 920 | inline void queryCacheSizes(int& l1, int& l2, int& l3) |
| 921 | { |
| 922 | #ifdef EIGEN_CPUID |
| 923 | int abcd[4]; |
| 924 | const int GenuineIntel[] = {0x756e6547, 0x49656e69, 0x6c65746e}; |
| 925 | const int AuthenticAMD[] = {0x68747541, 0x69746e65, 0x444d4163}; |
| 926 | const int AMDisbetter_[] = {0x69444d41, 0x74656273, 0x21726574}; // "AMDisbetter!" |
| 927 | |
| 928 | // identify the CPU vendor |
| 929 | EIGEN_CPUID(abcd,0x0,0); |
| 930 | int max_std_funcs = abcd[1]; |
| 931 | if(cpuid_is_vendor(abcd,GenuineIntel)) |
| 932 | queryCacheSizes_intel(l1,l2,l3,max_std_funcs); |
| 933 | else if(cpuid_is_vendor(abcd,AuthenticAMD) || cpuid_is_vendor(abcd,AMDisbetter_)) |
| 934 | queryCacheSizes_amd(l1,l2,l3); |
| 935 | else |
| 936 | // by default let's use Intel's API |
| 937 | queryCacheSizes_intel(l1,l2,l3,max_std_funcs); |
| 938 | |
| 939 | // here is the list of other vendors: |
| 940 | // ||cpuid_is_vendor(abcd,"VIA VIA VIA ") |
| 941 | // ||cpuid_is_vendor(abcd,"CyrixInstead") |
| 942 | // ||cpuid_is_vendor(abcd,"CentaurHauls") |
| 943 | // ||cpuid_is_vendor(abcd,"GenuineTMx86") |
| 944 | // ||cpuid_is_vendor(abcd,"TransmetaCPU") |
| 945 | // ||cpuid_is_vendor(abcd,"RiseRiseRise") |
| 946 | // ||cpuid_is_vendor(abcd,"Geode by NSC") |
| 947 | // ||cpuid_is_vendor(abcd,"SiS SiS SiS ") |
| 948 | // ||cpuid_is_vendor(abcd,"UMC UMC UMC ") |
| 949 | // ||cpuid_is_vendor(abcd,"NexGenDriven") |
| 950 | #else |
| 951 | l1 = l2 = l3 = -1; |
| 952 | #endif |
| 953 | } |
| 954 | |
| 955 | /** \internal |
| 956 | * \returns the size in Bytes of the L1 data cache */ |
no test coverage detected