Method Write

pcsx2/SIO/Sio2.cpp:380–471

}

void Sio2::Write(u8 data)
{
	Sio2Log.WriteLn("%s(%02X) SIO2 DATA Write", __FUNCTION__, data);

	if (!queueRead)
	{
		// No more queue positions to access, but the game is still sending us SIO2 writes. Lets ignore them.
		if (queuePosition > CmdQueue.size())
		{
			Console.Warning("%s(%02X) Received data after exhausting all queue entries!", __FUNCTION__, data);
			return;
		}

		const u32 currentCmd = CmdQueue[queuePosition];
		port = currentCmd & Sio2Cmd::PORT;
		commandLength = (currentCmd >> 8) & Sio2Cmd::COMMAND_LENGTH_MASK;
		queueRead = true;

		// The freshly read cmd position had a length of 0, so we are done handling SIO2 commands until
		// the next cmd writes.
		if (commandLength == 0)
		{
			queueComplete = true;
		}

		// If the prior command did not need to fully pop g_Sio2FifoIn, do so now,
		// so that the next command isn't trying to read the last command's leftovers.
		while (!g_Sio2FifoIn.empty())
		{
			g_Sio2FifoIn.pop_front();
		}
	}

	if (queueComplete)
	{
		return;
	}

	g_Sio2FifoIn.push_back(data);

	// We have received as many command bytes as we expect, and...
	//
	// ... These were from direct writes into IOP memory (DMA block size is zero when direct writes occur)
	// ... These were from SIO2 DMA (DMA block size is non-zero when SIO2 DMA occurs)
	if ((g_Sio2FifoIn.size() == g_Sio2.commandLength && g_Sio2.dmaBlockSize == 0) || g_Sio2FifoIn.size() == g_Sio2.dmaBlockSize)
	{
		// Go ahead and prep so the next write triggers a load of the new cmd value.
		g_Sio2.queueRead = false;
		g_Sio2.queuePosition++;

		// Check the SIO mode
		const u8 sioMode = g_Sio2FifoIn.front();
		g_Sio2FifoIn.pop_front();

		switch (sioMode)
		{
			case SioMode::PAD:
				this->Pad();