| 470 | } |
| 471 | |
| 472 | u128 R5900DebugInterface::getRegister(int cat, int num) |
| 473 | { |
| 474 | u128 result; |
| 475 | switch (cat) |
| 476 | { |
| 477 | case EECAT_GPR: |
| 478 | switch (num) |
| 479 | { |
| 480 | case 32: // pc |
| 481 | result = u128::From32(cpuRegs.pc); |
| 482 | break; |
| 483 | case 33: // hi |
| 484 | result = cpuRegs.HI.UQ; |
| 485 | break; |
| 486 | case 34: // lo |
| 487 | result = cpuRegs.LO.UQ; |
| 488 | break; |
| 489 | default: |
| 490 | result = cpuRegs.GPR.r[num].UQ; |
| 491 | break; |
| 492 | } |
| 493 | break; |
| 494 | case EECAT_CP0: |
| 495 | result = u128::From32(cpuRegs.CP0.r[num]); |
| 496 | break; |
| 497 | case EECAT_FPR: |
| 498 | result = u128::From32(fpuRegs.fpr[num].UL); |
| 499 | break; |
| 500 | case EECAT_FCR: |
| 501 | result = u128::From32(fpuRegs.fprc[num]); |
| 502 | break; |
| 503 | case EECAT_VU0F: |
| 504 | switch (num) |
| 505 | { |
| 506 | case 32: // ACC |
| 507 | result = VU0.ACC.UQ; |
| 508 | break; |
| 509 | default: |
| 510 | result = VU0.VF[num].UQ; |
| 511 | break; |
| 512 | } |
| 513 | break; |
| 514 | case EECAT_VU0I: |
| 515 | result = u128::From32(VU0.VI[num].UL); |
| 516 | break; |
| 517 | case EECAT_GSPRIV: |
| 518 | result = gsNonMirroredRead(0x12000000 | R5900::GS_REG_PRIV_ADDR[num]); |
| 519 | break; |
| 520 | default: |
| 521 | result = u128::From32(0); |
| 522 | break; |
| 523 | } |
| 524 | |
| 525 | return result; |
| 526 | } |
| 527 | |
| 528 | std::string R5900DebugInterface::getRegisterString(int cat, int num) |
| 529 | { |
no test coverage detected