Read Fifo into an iop tag, and transfer it to hw_dma9. And presumably process it.
| 114 | |
| 115 | // Read Fifo into an iop tag, and transfer it to hw_dma9. And presumably process it. |
| 116 | static __fi bool ProcessIOPTag() |
| 117 | { |
| 118 | // Process DMA tag at hw_dma9.tadr |
| 119 | sif0.iop.data = *(sifData *)iopPhysMem(hw_dma9.tadr); |
| 120 | sif0.iop.data.words = sif0.iop.data.words; |
| 121 | |
| 122 | // send the EE's side of the DMAtag. The tag is only 64 bits, with the upper 64 bits being the next IOP tag |
| 123 | // ignored by the EE, however required for alignment and used as junk data in small packets. |
| 124 | sif0.fifo.write((u32*)iopPhysMem(hw_dma9.tadr + 8), 4); |
| 125 | |
| 126 | // I know we just sent 1QW, because of the size of the EE read, but only 64bits was valid |
| 127 | // so we advance by 64bits after the EE tag to get the next IOP tag. |
| 128 | hw_dma9.tadr += 16; |
| 129 | |
| 130 | // We're only copying the first 24 bits. Bits 30 and 31 (checked below) are Stop/IRQ bits. |
| 131 | hw_dma9.madr = sif0data & 0xFFFFFF; |
| 132 | if (sif0words > 0xFFFFF) DevCon.Warning("SIF0 Overrun %x", sif0words); |
| 133 | //Maximum transfer amount 1mb-16 also masking out top part which is a "Mode" cache stuff, we don't care :) |
| 134 | sif0.iop.counter = sif0words & 0xFFFFF; |
| 135 | |
| 136 | // Save the number of words we need to write to make up 1QW from this packet. (See "Junk data writing" in Sif.h) |
| 137 | sif0.iop.writeJunk = (sif0.iop.counter & 0x3) ? (4 - sif0.iop.counter & 0x3) : 0; |
| 138 | |
| 139 | // IOP tags have an IRQ bit and an End of Transfer bit: |
| 140 | if (sif0tag.IRQ || (sif0tag.ID & 4)) sif0.iop.end = true; |
| 141 | SIF_LOG("SIF0 IOP Tag: madr=%lx, tadr=%lx, counter=%lx (%08X_%08X) Junk %d", hw_dma9.madr, hw_dma9.tadr, sif0.iop.counter, sif0words, sif0data, sif0.iop.writeJunk); |
| 142 | |
| 143 | return true; |
| 144 | } |
| 145 | |
| 146 | // Stop transferring ee, and signal an interrupt. |
| 147 | static __fi void EndEE() |
no test coverage detected