| 981 | |
| 982 | template <int CoreIdx, int cAddr> |
| 983 | static void RegWrite_Core(u16 value) |
| 984 | { |
| 985 | const int omem = cAddr; |
| 986 | const int core = CoreIdx; |
| 987 | V_Core& thiscore = Cores[core]; |
| 988 | |
| 989 | switch (omem) |
| 990 | { |
| 991 | case REG__1AC: |
| 992 | // ---------------------------------------------------------------------------- |
| 993 | // 0x1ac / 0x5ac : direct-write to DMA address : special register (undocumented) |
| 994 | // ---------------------------------------------------------------------------- |
| 995 | // On the GS, DMAs are actually pushed through a hardware register. Chances are the |
| 996 | // SPU works the same way, and "technically" *all* DMA data actually passes through |
| 997 | // the HW registers at 0x1ac (core0) and 0x5ac (core1). We handle normal DMAs in |
| 998 | // optimized block copy fashion elsewhere, but some games will write this register |
| 999 | // directly, so handle those here: |
| 1000 | |
| 1001 | // Performance Note: The PS2 Bios uses this extensively right before booting games, |
| 1002 | // causing massive slowdown if we don't shortcut it here. |
| 1003 | thiscore.ActiveTSA = thiscore.TSA; |
| 1004 | for (int i = 0; i < 2; i++) |
| 1005 | { |
| 1006 | if (Cores[i].IRQEnable && (Cores[i].IRQA == thiscore.ActiveTSA)) |
| 1007 | { |
| 1008 | SetIrqCall(i); |
| 1009 | } |
| 1010 | } |
| 1011 | thiscore.DmaWrite(value); |
| 1012 | break; |
| 1013 | |
| 1014 | case REG_C_ATTR: |
| 1015 | { |
| 1016 | bool irqe = thiscore.IRQEnable; |
| 1017 | int bit0 = thiscore.AttrBit0; |
| 1018 | bool oldFXenable = thiscore.FxEnable; |
| 1019 | u8 oldDmaMode = thiscore.DmaMode; |
| 1020 | |
| 1021 | thiscore.AttrBit0 = (value >> 0) & 0x01; //1 bit |
| 1022 | thiscore.DMABits = (value >> 1) & 0x07; //3 bits |
| 1023 | thiscore.DmaMode = (value >> 4) & 0x03; //2 bit (not necessary, we get the direction from the iop) |
| 1024 | thiscore.IRQEnable = (value >> 6) & 0x01; //1 bit |
| 1025 | thiscore.FxEnable = (value >> 7) & 0x01; //1 bit |
| 1026 | thiscore.NoiseClk = (value >> 8) & 0x3f; //6 bits |
| 1027 | //thiscore.Mute =(value>>14) & 0x01; //1 bit |
| 1028 | thiscore.Mute = 0; |
| 1029 | //thiscore.CoreEnabled=(value>>15) & 0x01; //1 bit |
| 1030 | // no clue |
| 1031 | thiscore.Regs.ATTR = value & 0xffff; |
| 1032 | |
| 1033 | if (thiscore.FxEnable && !oldFXenable) |
| 1034 | { |
| 1035 | if (SPU2::MsgToConsole()) |
| 1036 | thiscore.AnalyzeReverbPreset(); |
| 1037 | } |
| 1038 | |
| 1039 | if (!thiscore.DmaMode && !(thiscore.Regs.STATX & 0x400)) |
| 1040 | thiscore.Regs.STATX &= ~0x80; |
nothing calls this directly
no test coverage detected