| 218 | } |
| 219 | |
| 220 | static __fi void _dmaSPR0() |
| 221 | { |
| 222 | // Transfer Dn_QWC from SPR to Dn_MADR |
| 223 | switch(spr0ch.chcr.MOD) |
| 224 | { |
| 225 | case NORMAL_MODE: |
| 226 | { |
| 227 | if (dmacRegs.ctrl.STS == STS_fromSPR) // STS == fromSPR |
| 228 | { |
| 229 | dmacRegs.stadr.ADDR = spr0ch.madr; |
| 230 | } |
| 231 | SPR0chain(); |
| 232 | spr0finished = true; |
| 233 | return; |
| 234 | } |
| 235 | case CHAIN_MODE: |
| 236 | { |
| 237 | tDMA_TAG *ptag; |
| 238 | bool done = false; |
| 239 | |
| 240 | if (spr0ch.qwc > 0) |
| 241 | { |
| 242 | SPR0chain(); |
| 243 | return; |
| 244 | } |
| 245 | // Destination Chain Mode |
| 246 | ptag = (tDMA_TAG*)&psSu32(spr0ch.sadr); |
| 247 | spr0ch.sadr += 16; |
| 248 | spr0ch.sadr &= 0x3FFF; // Limited to 16K |
| 249 | |
| 250 | spr0ch.unsafeTransfer(ptag); |
| 251 | |
| 252 | spr0ch.madr = ptag[1]._u32; // MADR = ADDR field + SPR |
| 253 | |
| 254 | SPR_LOG("spr0 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx", |
| 255 | ptag[1]._u32, ptag[0]._u32, spr0ch.qwc, ptag->ID, spr0ch.madr, spr0ch.sadr); |
| 256 | |
| 257 | switch (ptag->ID) |
| 258 | { |
| 259 | case TAG_CNTS: // CNTS - Transfer QWC following the tag (Stall Control) |
| 260 | if (dmacRegs.ctrl.STS == STS_fromSPR) // STS == fromSPR - Initial Value |
| 261 | { |
| 262 | dmacRegs.stadr.ADDR = spr0ch.madr; |
| 263 | } |
| 264 | break; |
| 265 | |
| 266 | case TAG_CNT: // CNT - Transfer QWC following the tag. |
| 267 | done = false; |
| 268 | break; |
| 269 | |
| 270 | case TAG_END: // End - Transfer QWC following the tag |
| 271 | done = true; |
| 272 | break; |
| 273 | } |
| 274 | |
| 275 | SPR0chain(); |
| 276 | |
| 277 | if (spr0ch.chcr.TIE && ptag->IRQ) // Check TIE bit of CHCR and IRQ bit of tag |
no test coverage detected