* Register jump * * Format: OP rs, rd * *********************************************************/
| 516 | * Format: OP rs, rd * |
| 517 | *********************************************************/ |
| 518 | void JR() |
| 519 | { |
| 520 | // 0x33ad48 and 0x35060c are the return address of the function (0x356250) that populate the TLB cache |
| 521 | if (EmuConfig.Gamefixes.GoemonTlbHack) { |
| 522 | const u32 add = cpuRegs.GPR.r[_Rs_].UL[0]; |
| 523 | if (add == 0x33ad48 || add == 0x35060c) |
| 524 | GoemonPreloadTlb(); |
| 525 | } |
| 526 | doBranch(cpuRegs.GPR.r[_Rs_].UL[0]); |
| 527 | } |
| 528 | |
| 529 | void JALR() |
| 530 | { |
nothing calls this directly
no test coverage detected