| 511 | } |
| 512 | |
| 513 | static __fi bool mfifoGIFrbTransfer() |
| 514 | { |
| 515 | const u32 qwc = std::min(QWCinGIFMFIFO(gifch.madr), gifch.qwc); |
| 516 | |
| 517 | if (qwc == 0) // Either gifch.qwc is 0 (shouldn't get here) or the FIFO is empty. |
| 518 | return true; |
| 519 | |
| 520 | u8* src = (u8*)PSM(gifch.madr); |
| 521 | if (src == NULL) |
| 522 | return false; |
| 523 | |
| 524 | const u32 MFIFOUntilEnd = ((dmacRegs.rbor.ADDR + dmacRegs.rbsr.RMSK + 16) - gifch.madr) >> 4; |
| 525 | const bool needWrap = MFIFOUntilEnd < qwc; |
| 526 | const u32 firstTransQWC = needWrap ? MFIFOUntilEnd : qwc; |
| 527 | const u32 transferred = WRITERING_DMA((u32*)src, firstTransQWC); // First part |
| 528 | |
| 529 | gifch.madr = dmacRegs.rbor.ADDR + (gifch.madr & dmacRegs.rbsr.RMSK); |
| 530 | gifch.tadr = dmacRegs.rbor.ADDR + (gifch.tadr & dmacRegs.rbsr.RMSK); |
| 531 | |
| 532 | if (needWrap && transferred == MFIFOUntilEnd) |
| 533 | { |
| 534 | src = (u8*)PSM(dmacRegs.rbor.ADDR); |
| 535 | if (src == NULL) |
| 536 | return false; |
| 537 | |
| 538 | // Need to do second transfer to wrap around |
| 539 | const uint secondTransQWC = qwc - MFIFOUntilEnd; |
| 540 | const u32 transferred2 = WRITERING_DMA((u32*)src, secondTransQWC); // Second part |
| 541 | |
| 542 | gif.mfifocycles += (transferred2 + transferred) * 2; |
| 543 | } |
| 544 | else |
| 545 | gif.mfifocycles += transferred * 2; |
| 546 | |
| 547 | return true; |
| 548 | } |
| 549 | |
| 550 | static __fi void mfifoGIFchain() |
| 551 | { |
no test coverage detected