| 1028 | } |
| 1029 | |
| 1030 | void DEV9write32(u32 addr, u32 value) |
| 1031 | { |
| 1032 | if (!EmuConfig.DEV9.EthEnable && !EmuConfig.DEV9.HddEnable) |
| 1033 | return; |
| 1034 | |
| 1035 | if (addr >= ATA_DEV9_HDD_BASE && addr < ATA_DEV9_HDD_END) |
| 1036 | { |
| 1037 | #ifdef ENABLE_ATA |
| 1038 | ata_write<4>(addr, value); |
| 1039 | #endif |
| 1040 | return; |
| 1041 | } |
| 1042 | if (addr >= SMAP_REGBASE && addr < FLASH_REGBASE) |
| 1043 | { |
| 1044 | //smap |
| 1045 | smap_write32(addr, value); |
| 1046 | return; |
| 1047 | } |
| 1048 | if ((addr >= FLASH_REGBASE) && (addr < (FLASH_REGBASE + FLASH_REGSIZE))) |
| 1049 | { |
| 1050 | FLASHwrite32(addr, static_cast<u32>(value), 4); |
| 1051 | return; |
| 1052 | } |
| 1053 | |
| 1054 | switch (addr) |
| 1055 | { |
| 1056 | case SPD_R_INTR_MASK: |
| 1057 | Console.Error("DEV9: SPD_R_INTR_MASK, WTFH ?"); |
| 1058 | break; |
| 1059 | default: |
| 1060 | dev9Ru32(addr) = value; |
| 1061 | Console.Error("DEV9: Unknown 32bit write at address %lx write %x", addr, value); |
| 1062 | return; |
| 1063 | } |
| 1064 | } |
| 1065 | |
| 1066 | void DEV9readDMA8Mem(u32* pMem, int size) |
| 1067 | { |
no test coverage detected