CPU-side window partition: rearrange [D, H*W] features into [256, 16, D] (256 windows of 4x4=16 tokens each, assuming H=W=64 and window_size=4). Input layout: [D, H*W] with inner dim D (ggml convention: ne[0]=D, ne[1]=H*W). Stored row-major: element (d, pos) at flat[d + pos * D], pos = w + h * W. Output layout: [D, 16, 256] — 256 windows, each with 16 tokens of dim D.
| 5544 | // Stored row-major: element (d, pos) at flat[d + pos * D], pos = w + h * W. |
| 5545 | // Output layout: [D, 16, 256] — 256 windows, each with 16 tokens of dim D. |
| 5546 | static void edgetam_window_partition_cpu( |
| 5547 | const float* src, int D, int H, int W, |
| 5548 | int window_size, float* dst) { |
| 5549 | const int nw_h = H / window_size; // 16 |
| 5550 | const int nw_w = W / window_size; // 16 |
| 5551 | const int ws2 = window_size * window_size; // 16 |
| 5552 | |
| 5553 | // For each window (wh, ww), for each pixel (ph, pw) within the window: |
| 5554 | // src_pos = (wh * ws + ph) * W + (ww * ws + pw) |
| 5555 | // dst: window_idx = wh * nw_w + ww, token_idx = ph * ws + pw |
| 5556 | // dst[d + token_idx * D + window_idx * D * ws2] |
| 5557 | for (int wh = 0; wh < nw_h; ++wh) { |
| 5558 | for (int ww = 0; ww < nw_w; ++ww) { |
| 5559 | int win_idx = wh * nw_w + ww; |
| 5560 | for (int ph = 0; ph < window_size; ++ph) { |
| 5561 | for (int pw = 0; pw < window_size; ++pw) { |
| 5562 | int tok_idx = ph * window_size + pw; |
| 5563 | int src_h = wh * window_size + ph; |
| 5564 | int src_w = ww * window_size + pw; |
| 5565 | int src_pos = src_w + src_h * W; // H*W spatial index |
| 5566 | |
| 5567 | // Copy D elements |
| 5568 | const float* s = src + src_pos * D; |
| 5569 | float* d = dst + win_idx * (D * ws2) + tok_idx * D; |
| 5570 | memcpy(d, s, D * sizeof(float)); |
| 5571 | } |
| 5572 | } |
| 5573 | } |
| 5574 | } |
| 5575 | } |
| 5576 | |
| 5577 | // Inverse of window partition: [D, 16, 256] → [D, H, W] spatial layout. |
| 5578 | // Rearranges 256 windows of 16 tokens each back into [D, H*W] feature map. |
no outgoing calls
no test coverage detected