| 216 | #endif // OPENRCT2_X86 |
| 217 | |
| 218 | bool SSE41Available() |
| 219 | { |
| 220 | #ifdef OPENRCT2_X86 |
| 221 | // SSE4.1 support is declared as the 19th bit of ECX with CPUID(EAX = 1). |
| 222 | uint32_t regs[4] = { 0 }; |
| 223 | if (CPUIDX86(regs, 1)) |
| 224 | { |
| 225 | return (regs[2] & (1 << 19)); |
| 226 | } |
| 227 | #endif |
| 228 | return false; |
| 229 | } |
| 230 | |
| 231 | bool AVX2Available() |
| 232 | { |
no test coverage detected