! set the affinity of a given thread */

wuffs_base__io_writer__limited_copy_u32_from_history_8_byte_chunks_fast is like the wuffs_base__io_writer__limited_copy_u32_from_history_fast function

wuffs_base__io_writer__limited_copy_u32_from_history_fast is like the wuffs_base__io_writer__limited_copy_u32_from_history function above, but has str

wuffs_base__private_implementation__high_prec_dec__assign sets h to represent the number x. Preconditions: - h is non-NULL.

wuffs_base__private_implementation__parse_number_f64_eisel_lemire produces the IEEE 754 double-precision value for an exact mantissa and base-10 expon

TODO: Simply return nullptr when failed to allocate?

C++ HeaderInfo to C EXRHeader conversion.

TODO(syoyo): Refactor function arguments.

out_data must be allocated initially with the block-header size of the current image(-part) type

can save a single or multi-part image (no deep* formats)

Add packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst. https://www.intel.com/content/www/us/en/docs/in

Compute the bitwise AND of packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst. https://www.intel.com/co

Blend packed double-precision (64-bit) floating-point elements from a and b using mask, and store the results in dst. https://www.intel.com/content/ww

Cast vector of type __m128d to type __m128. This intrinsic is only used for compilation and does not generate any instructions, thus it has zero laten

Cast vector of type __m128d to type __m128i. This intrinsic is only used for compilation and does not generate any instructions, thus it has zero late

Cast vector of type __m128 to type __m128d. This intrinsic is only used for compilation and does not generate any instructions, thus it has zero laten

Compare packed 64-bit integers in a and b for equality, and store the results in dst

Starting with the initial value in crc, accumulates a CRC32 value for unsigned 16-bit integer v, and stores the result in dst. https://www.intel.com/c

Starting with the initial value in crc, accumulates a CRC32 value for unsigned 32-bit integer v, and stores the result in dst. https://www.intel.com/c

Starting with the initial value in crc, accumulates a CRC32 value for unsigned 8-bit integer v, and stores the result in dst. https://www.intel.com/co

Zero extend packed unsigned 16-bit integers in a to packed 32-bit integers, and store the results in dst. https://www.intel.com/content/www/us/en/docs

Copy the lower double-precision (64-bit) floating-point element of a to dst. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#

Convert packed single-precision (32-bit) floating-point elements in a to packed 32-bit integers with truncation, and store the results in dst. https:/

Get the unsigned 32-bit value of the MXCSR control and status register. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=

Multiply packed signed 16-bit integers in a and b, producing intermediate signed 32-bit integers. Horizontally add adjacent pairs of intermediate 32-b

Vertically multiply each unsigned 8-bit integer from a with the corresponding signed 8-bit integer from b, producing intermediate signed 16-bit intege