-------------------------------------------------------------------------
| 911 | } |
| 912 | //------------------------------------------------------------------------- |
| 913 | void VulkanQueue::getCopyEncoderV1Buffer( const bool bDownload ) |
| 914 | { |
| 915 | if( mEncoderState != EncoderCopyOpen ) |
| 916 | { |
| 917 | endRenderEncoder(); |
| 918 | endComputeEncoder(); |
| 919 | |
| 920 | mEncoderState = EncoderCopyOpen; |
| 921 | } |
| 922 | |
| 923 | if( !bDownload ) |
| 924 | { |
| 925 | // V1 buffers are only used for vertex and index buffers |
| 926 | // We assume v1 buffers don't try to write then read (or read then write) in a row |
| 927 | const VkAccessFlags bufferAccessFlags = |
| 928 | VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT | VK_ACCESS_INDEX_READ_BIT; |
| 929 | |
| 930 | if( ( mCopyEndReadDstBufferFlags & bufferAccessFlags ) != bufferAccessFlags ) |
| 931 | { |
| 932 | uint32 numMemBarriers = 0u; |
| 933 | VkMemoryBarrier memBarrier; |
| 934 | makeVkStruct( memBarrier, VK_STRUCTURE_TYPE_MEMORY_BARRIER ); |
| 935 | memBarrier.srcAccessMask = bufferAccessFlags & c_srcValidAccessFlags; |
| 936 | memBarrier.dstAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT; |
| 937 | numMemBarriers = 1u; |
| 938 | |
| 939 | // GPU must stop using this buffer before we can write into it |
| 940 | vkCmdPipelineBarrier( mCurrentCmdBuffer, VK_PIPELINE_STAGE_VERTEX_INPUT_BIT, |
| 941 | VK_PIPELINE_STAGE_TRANSFER_BIT, 0, numMemBarriers, &memBarrier, 0u, |
| 942 | 0, 0u, 0 ); |
| 943 | } |
| 944 | |
| 945 | mCopyEndReadDstBufferFlags |= bufferAccessFlags; |
| 946 | mCopyEndReadSrcBufferFlags |= VK_ACCESS_TRANSFER_WRITE_BIT; |
| 947 | } |
| 948 | else |
| 949 | { |
| 950 | mCopyEndReadSrcBufferFlags |= VK_ACCESS_TRANSFER_READ_BIT; |
| 951 | } |
| 952 | } |
| 953 | //------------------------------------------------------------------------- |
| 954 | void VulkanQueue::endCopyEncoder() |
| 955 | { |
no test coverage detected