Emits a compressed register arithmetic instruction. These consist of: funct6 | rd | funct2 | rs | op
| 59 | // Emits a compressed register arithmetic instruction. These consist of: |
| 60 | // funct6 | rd | funct2 | rs | op |
| 61 | void EmitCompressedRegArith(CodeBuffer& buffer, uint32_t funct6, GPR rd, uint32_t funct2, |
| 62 | GPR rs, uint32_t op) { |
| 63 | BISCUIT_ASSERT(IsValid3BitCompressedReg(rs)); |
| 64 | BISCUIT_ASSERT(IsValid3BitCompressedReg(rd)); |
| 65 | |
| 66 | const auto rd_san = CompressedRegTo3BitEncoding(rd); |
| 67 | const auto rs_san = CompressedRegTo3BitEncoding(rs); |
| 68 | buffer.Emit16(((funct6 & 0b111111) << 10) | (rd_san << 7) | ((funct2 & 0b11) << 5) | |
| 69 | (rs_san << 2) | (op & 0b11)); |
| 70 | } |
| 71 | |
| 72 | // Emits a compressed store instruction. These consist of: |
| 73 | // funct3 | imm | rs1 | imm | rs2 | op |
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