| 125 | }; |
| 126 | |
| 127 | enum class Operand { |
| 128 | Rd, // GPR |
| 129 | Rs, // GPR |
| 130 | Rt, // GPR |
| 131 | Fd, // FPR |
| 132 | Fs, // FPR |
| 133 | Ft, // FPR |
| 134 | FdDouble, // Double float in fd FPR |
| 135 | FsDouble, // Double float in fs FPR |
| 136 | FtDouble, // Double float in ft FPR |
| 137 | // Raw low 32-bit values of FPRs with handling for mips3 float mode behavior |
| 138 | FdU32L, |
| 139 | FsU32L, |
| 140 | FtU32L, |
| 141 | // Raw high 32-bit values of FPRs with handling for mips3 float mode behavior |
| 142 | FdU32H, |
| 143 | FsU32H, |
| 144 | FtU32H, |
| 145 | // Raw 64-bit values of FPRs |
| 146 | FdU64, |
| 147 | FsU64, |
| 148 | FtU64, |
| 149 | ImmU16, // 16-bit immediate, unsigned |
| 150 | ImmS16, // 16-bit immediate, signed |
| 151 | Sa, // Shift amount |
| 152 | Sa32, // Shift amount plus 32 |
| 153 | Cop1cs, // Coprocessor 1 Condition Signal |
| 154 | Hi, |
| 155 | Lo, |
| 156 | Zero, |
| 157 | |
| 158 | Base = Rs, // Alias for Rs for loads |
| 159 | }; |
| 160 | |
| 161 | struct StoreOp { |
| 162 | StoreOpType type; |
nothing calls this directly
no outgoing calls
no test coverage detected