| 31 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "pc", "xpsr", "sp", "other_sp" |
| 32 | }; |
| 33 | void print_state(uc_engine *uc) { |
| 34 | uint32_t reg; |
| 35 | fprintf(stderr, "\n==== UC Reg state ====\n"); |
| 36 | for (int i = 0; i < NUM_DUMPED_REGS; ++i) |
| 37 | { |
| 38 | uc->reg_read(uc->ctx, reg_ids[i], ®); |
| 39 | fprintf(stderr, "%s: 0x%08x\n", reg_names[i], reg); |
| 40 | } |
| 41 | fprintf(stderr, "\n==== UC Stack state ====\n"); |
| 42 | uint32_t sp; |
| 43 | uc->reg_read(uc->ctx, UC_ARM_REG_SP, &sp); |
| 44 | for (int i = -4; i < 16; ++i) |
| 45 | { |
| 46 | uint32_t val; |
| 47 | if(uc->mem_read(uc->ctx, sp+4*i, &val, 4)) { |
| 48 | continue; |
| 49 | } |
| 50 | fprintf(stderr, "0x%08x: %08x", sp+4*i, val); |
| 51 | if(!i) { |
| 52 | fprintf(stderr, " <---- sp\n"); |
| 53 | } else { |
| 54 | fprintf(stderr, "\n"); |
| 55 | } |
| 56 | } |
| 57 | fprintf(stderr, "======================\n\n"); |
| 58 | |
| 59 | fprintf(stderr, "\n==== UC Other Stack state ====\n"); |
| 60 | uc->reg_read(uc->ctx, UC_ARM_REG_OTHER_SP, &sp); |
| 61 | for (int i = -4; i < 16; ++i) |
| 62 | { |
| 63 | uint32_t val; |
| 64 | if(uc->mem_read(uc->ctx, sp+4*i, &val, 4)) { |
| 65 | continue; |
| 66 | } |
| 67 | fprintf(stderr, "0x%08x: %08x", sp+4*i, val); |
| 68 | if(!i) { |
| 69 | fprintf(stderr, " <---- sp\n"); |
| 70 | } else { |
| 71 | fprintf(stderr, "\n"); |
| 72 | } |
| 73 | } |
| 74 | fprintf(stderr, "======================\n\n"); |
| 75 | fflush(stderr); |
| 76 | } |
| 77 | |
| 78 | |
| 79 | const char *uc_strerror(uc_err code) { |
no outgoing calls
no test coverage detected