| 249 | } |
| 250 | |
| 251 | void EagerEvalManager::ensure_input_layout(VarNode* var) { |
| 252 | auto&& mem_mgr = |
| 253 | ComputingGraphImpl::downcast(var->owner_graph())->var_node_mem_manager(); |
| 254 | |
| 255 | auto trait = mem_mgr.get_var_node_mem_trait_nullable(var); |
| 256 | if (!trait || trait->check_layout(var->layout())) { |
| 257 | return; |
| 258 | } |
| 259 | DeviceTensorND val_contig; |
| 260 | val_contig.copy_from(var->dev_tensor()); |
| 261 | |
| 262 | auto&& chk = var->m_mem_plan.reset_from_owner_var().chunk(); |
| 263 | var->assign_dev_tensor_from_tensor(val_contig); |
| 264 | chk.mem_alloc_status.set_from_owner_var(); |
| 265 | } |
| 266 | |
| 267 | void EagerEvalManager::alloc_output_mem(OperatorNodeBase* opr) { |
| 268 | size_t nr_disallow_dynamic = 0, nr_readable_out = 0; |
nothing calls this directly
no test coverage detected