(ctx, *args: Union[HLOTensor, Sequence[HLOTensor]])
| 301 | |
| 302 | @register_lower_rule(mops.Resize) |
| 303 | def resize_lower(ctx, *args: Union[HLOTensor, Sequence[HLOTensor]]): |
| 304 | assert ( |
| 305 | len(args) == 2 and len(ctx.vars_in) == 2 |
| 306 | ), f"Resize should have 2 inputs, get {len(args)}" |
| 307 | assert ( |
| 308 | len(ctx.vars_out) == 1 |
| 309 | ), f"Resize should have 1 output, get {len(ctx.vars_out)}" |
| 310 | |
| 311 | inp, size = args[0], ctx.vars_out[0].shape[2:] |
| 312 | fmt, imode = ctx.op.format, ctx.op.imode |
| 313 | assert len(size) == 2, f"illegal size {size}" |
| 314 | |
| 315 | if fmt == mops.AdaptivePooling.Format.NCHW: |
| 316 | if imode == mops.Remap.InterpolationMode.NEAREST: |
| 317 | return resize_nearest(inp, size) |
| 318 | elif imode == mops.Remap.InterpolationMode.LINEAR: |
| 319 | return resize_linear(inp, size) |
| 320 | else: |
| 321 | assert False, f"imode {imode} is not supported" |
| 322 | else: |
| 323 | assert False, f"format {fmt} is not supported" |
| 324 | |
| 325 | |
| 326 | # we rewrite the cuda kernel of megdnn to implement resize |
nothing calls this directly
no test coverage detected