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Function get_int8_nchw4_args

dnn/test/cuda/batch_conv_bias.cpp:25–58  ·  view source on GitHub ↗

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23};
24
25std::vector<TestArg> get_int8_nchw4_args(size_t kernel_size = 1) {
26 std::vector<TestArg> args;
27 using NLMode = param::BatchConvBias::NonlineMode;
28
29 for (auto nlmode : {NLMode::IDENTITY, NLMode::RELU, NLMode::H_SWISH}) {
30 for (size_t b : {1, 2}) {
31 for (size_t ic : {4, 8, 16}) {
32 for (size_t oc : {4, 44, 84, 132}) {
33 for (size_t h : {8, 16}) {
34 for (size_t w : {4, 8}) {
35 for (int p : {0, static_cast<int>(kernel_size / 2)}) {
36 for (size_t s : {1, 2}) {
37 size_t f = kernel_size;
38 param::BatchConvBias param;
39 param.nonlineMode = nlmode;
40 param.format = param::BatchConvBias::Format::NCHW4;
41 param.sparse = param::BatchConvBias::Sparse::DENSE;
42 param.pad_h = param.pad_w = p;
43 param.stride_h = param.stride_w = s;
44
45 args.emplace_back(
46 param, TensorShape{b, ic / 4, h, w, 4},
47 TensorShape{b, oc, ic / 4, f, f, 4},
48 TensorShape{1, oc / 4, 1, 1, 4});
49 }
50 }
51 }
52 }
53 }
54 }
55 }
56 }
57 return args;
58}
59
60std::vector<TestArg> get_int8_nchw4_args_gemm() {
61 std::vector<TestArg> args;

Callers 2

TEST_FFunction · 0.70
TEST_FFunction · 0.70

Calls 1

emplace_backMethod · 0.80

Tested by

no test coverage detected