| 203 | |
| 204 | template <typename CellOpr> |
| 205 | WorkspaceBundle get_workspace_bundle( |
| 206 | const TensorLayout& input, const TensorLayout& output, |
| 207 | const TensorLayout& flatten_weights, size_t hidden_size, size_t dir_size, |
| 208 | size_t states_size) { |
| 209 | size_t batch_size = input.shape[1]; |
| 210 | size_t input_size = input.shape[2]; |
| 211 | size_t gate_hidden_size = flatten_weights.shape[0]; |
| 212 | |
| 213 | // cell workspace |
| 214 | TensorLayout weight_ih{{gate_hidden_size, input_size}, flatten_weights.dtype}; |
| 215 | TensorLayout weight_hh{ |
| 216 | {gate_hidden_size, dir_size * hidden_size}, flatten_weights.dtype}; |
| 217 | TensorLayout bias{{1, gate_hidden_size}, flatten_weights.dtype}; |
| 218 | TensorLayout hx{{batch_size, dir_size * hidden_size}, input.dtype}; |
| 219 | |
| 220 | auto cell_opr = inplace_cpu_handle()->create_operator<CellOpr>(); |
| 221 | |
| 222 | TensorLayout h_new, c_new, gates; |
| 223 | cell_opr->deduce_layout( |
| 224 | input, weight_ih, bias, hx, weight_hh, bias, hx, h_new, c_new, gates); |
| 225 | |
| 226 | SmallVector<size_t> workspaces; |
| 227 | //! the cell opr compute workspace |
| 228 | size_t cell_opr_workspace = cell_opr->get_workspace_in_bytes( |
| 229 | input, weight_ih, bias, hx, weight_hh, bias, hx, h_new, c_new, gates); |
| 230 | workspaces.push_back(gates.span().dist_byte()); |
| 231 | workspaces.push_back(cell_opr_workspace); |
| 232 | //! double tmp output memory |
| 233 | size_t tmp_output_workspace = output.span().dist_byte(); |
| 234 | workspaces.push_back(tmp_output_workspace); |
| 235 | workspaces.push_back(tmp_output_workspace); |
| 236 | |
| 237 | //! tmp states memory |
| 238 | size_t tmp_state_workspace = hx.span().dist_byte(); |
| 239 | for (size_t i = 0; i < states_size; i++) { |
| 240 | workspaces.push_back(tmp_state_workspace); |
| 241 | } |
| 242 | return {nullptr, workspaces}; |
| 243 | } |
| 244 | |
| 245 | } // namespace arm_common |
| 246 | } // namespace megdnn |
no test coverage detected