(args)
| 1569 | |
| 1570 | # |
| 1571 | def GenerateGemv_Simt(args): |
| 1572 | threadBlockShape_N = [128, 64, 32] |
| 1573 | ldgBits_A = [128, 64, 32] |
| 1574 | ldgBits_B = [128, 64, 32] |
| 1575 | |
| 1576 | layouts = [(LayoutType.RowMajor, LayoutType.RowMajor, LayoutType.RowMajor)] |
| 1577 | |
| 1578 | math_instructions = [ |
| 1579 | MathInstruction( |
| 1580 | [1, 1, 1], |
| 1581 | DataType.f32, |
| 1582 | DataType.f32, |
| 1583 | DataType.f32, |
| 1584 | OpcodeClass.Simt, |
| 1585 | MathOperation.multiply_add, |
| 1586 | ) |
| 1587 | ] |
| 1588 | |
| 1589 | min_cc = 50 |
| 1590 | |
| 1591 | operations = [] |
| 1592 | for math_inst in math_instructions: |
| 1593 | for layout in layouts: |
| 1594 | data_type = [ |
| 1595 | math_inst.element_a, |
| 1596 | math_inst.element_b, |
| 1597 | math_inst.element_accumulator, |
| 1598 | math_inst.element_accumulator, |
| 1599 | ] |
| 1600 | for threadblock_shape_n in threadBlockShape_N: |
| 1601 | for align_a in ldgBits_A: |
| 1602 | for align_b in ldgBits_B: |
| 1603 | ldg_elements_a = align_a // DataTypeSize[math_inst.element_a] |
| 1604 | ldg_elements_b = align_b // DataTypeSize[math_inst.element_b] |
| 1605 | threadblock_shape_k = (256 * ldg_elements_a) // ( |
| 1606 | threadblock_shape_n // ldg_elements_b |
| 1607 | ) |
| 1608 | threadblock_shape = [ |
| 1609 | 1, |
| 1610 | threadblock_shape_n, |
| 1611 | threadblock_shape_k, |
| 1612 | ] |
| 1613 | thread_shape = [1, ldg_elements_b, ldg_elements_a] |
| 1614 | |
| 1615 | operations.append( |
| 1616 | GeneratesGemv( |
| 1617 | math_inst, |
| 1618 | threadblock_shape, |
| 1619 | thread_shape, |
| 1620 | data_type, |
| 1621 | layout[0], |
| 1622 | layout[1], |
| 1623 | layout[2], |
| 1624 | min_cc, |
| 1625 | align_a, |
| 1626 | align_b, |
| 1627 | ) |
| 1628 | ) |
no test coverage detected