| 312 | // |
| 313 | |
| 314 | void SoftwareSerial::begin(long speed) |
| 315 | { |
| 316 | _rx_delay_centering = _rx_delay_intrabit = _rx_delay_stopbit = _tx_delay = 0; |
| 317 | |
| 318 | // Precalculate the various delays, in number of 4-cycle delays |
| 319 | uint16_t bit_delay = (F_CPU / speed) / 4; |
| 320 | |
| 321 | // 12 (gcc 4.8.2) or 13 (gcc 4.3.2) cycles from start bit to first bit, |
| 322 | // 15 (gcc 4.8.2) or 16 (gcc 4.3.2) cycles between bits, |
| 323 | // 12 (gcc 4.8.2) or 14 (gcc 4.3.2) cycles from last bit to stop bit |
| 324 | // These are all close enough to just use 15 cycles, since the inter-bit |
| 325 | // timings are the most critical (deviations stack 8 times) |
| 326 | _tx_delay = subtract_cap(bit_delay, 15 / 4); |
| 327 | |
| 328 | #if defined(PCINT_ONLY) || defined(INT_AND_PCINT) |
| 329 | // Only setup rx when we have a valid PCINT for this pin |
| 330 | if (digitalPinToPCICR(_receivePin)) { |
| 331 | #if GCC_VERSION > 40800 |
| 332 | // Timings counted from gcc 4.8.2 output. This works up to 115200 on |
| 333 | // 16Mhz and 57600 on 8Mhz. |
| 334 | // |
| 335 | // When the start bit occurs, there are 3 or 4 cycles before the |
| 336 | // interrupt flag is set, 4 cycles before the PC is set to the right |
| 337 | // interrupt vector address and the old PC is pushed on the stack, |
| 338 | // and then 75 cycles of instructions (including the RJMP in the |
| 339 | // ISR vector table) until the first delay. After the delay, there |
| 340 | // are 17 more cycles until the pin value is read (excluding the |
| 341 | // delay in the loop). |
| 342 | // We want to have a total delay of 1.5 bit time. Inside the loop, |
| 343 | // we already wait for 1 bit time - 23 cycles, so here we wait for |
| 344 | // 0.5 bit time - (71 + 18 - 22) cycles. |
| 345 | _rx_delay_centering = subtract_cap(bit_delay / 2, (4 + 4 + 75 + 17 - 23) / 4); |
| 346 | |
| 347 | // There are 23 cycles in each loop iteration (excluding the delay) |
| 348 | _rx_delay_intrabit = subtract_cap(bit_delay, 23 / 4); |
| 349 | |
| 350 | // There are 37 cycles from the last bit read to the start of |
| 351 | // stopbit delay and 11 cycles from the delay until the interrupt |
| 352 | // mask is enabled again (which _must_ happen during the stopbit). |
| 353 | // This delay aims at 3/4 of a bit time, meaning the end of the |
| 354 | // delay will be at 1/4th of the stopbit. This allows some extra |
| 355 | // time for ISR cleanup, which makes 115200 baud at 16Mhz work more |
| 356 | // reliably |
| 357 | _rx_delay_stopbit = subtract_cap(bit_delay * 3 / 4, (37 + 11) / 4); |
| 358 | #else // Timings counted from gcc 4.3.2 output |
| 359 | // Note that this code is a _lot_ slower, mostly due to bad register |
| 360 | // allocation choices of gcc. This works up to 57600 on 16Mhz and |
| 361 | // 38400 on 8Mhz. |
| 362 | _rx_delay_centering = subtract_cap(bit_delay / 2, (4 + 4 + 97 + 29 - 11) / 4); |
| 363 | _rx_delay_intrabit = subtract_cap(bit_delay, 11 / 4); |
| 364 | _rx_delay_stopbit = subtract_cap(bit_delay * 3 / 4, (44 + 17) / 4); |
| 365 | #endif |
| 366 | |
| 367 | |
| 368 | // Enable the PCINT for the entire port here, but never disable it |
| 369 | // (others might also need it, so we disable the interrupt by using |
| 370 | // the per-pin PCMSK register). |
| 371 | *digitalPinToPCICR(_receivePin) |= _BV(digitalPinToPCICRbit(_receivePin)); |
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