| 118 | #endif |
| 119 | |
| 120 | void SPIClass::usingInterrupt(uint8_t interruptNumber) |
| 121 | { |
| 122 | uint8_t mask = 0; |
| 123 | uint8_t sreg = SREG; |
| 124 | noInterrupts(); // Protect from a scheduler and prevent transactionBegin |
| 125 | switch (interruptNumber) { |
| 126 | #ifdef SPI_INT0_MASK |
| 127 | case 0: mask = SPI_INT0_MASK; break; |
| 128 | #endif |
| 129 | #ifdef SPI_INT1_MASK |
| 130 | case 1: mask = SPI_INT1_MASK; break; |
| 131 | #endif |
| 132 | #ifdef SPI_INT2_MASK |
| 133 | case 2: mask = SPI_INT2_MASK; break; |
| 134 | #endif |
| 135 | #ifdef SPI_INT3_MASK |
| 136 | case 3: mask = SPI_INT3_MASK; break; |
| 137 | #endif |
| 138 | #ifdef SPI_INT4_MASK |
| 139 | case 4: mask = SPI_INT4_MASK; break; |
| 140 | #endif |
| 141 | #ifdef SPI_INT5_MASK |
| 142 | case 5: mask = SPI_INT5_MASK; break; |
| 143 | #endif |
| 144 | #ifdef SPI_INT6_MASK |
| 145 | case 6: mask = SPI_INT6_MASK; break; |
| 146 | #endif |
| 147 | #ifdef SPI_INT7_MASK |
| 148 | case 7: mask = SPI_INT7_MASK; break; |
| 149 | #endif |
| 150 | default: |
| 151 | interruptMode = 2; |
| 152 | break; |
| 153 | } |
| 154 | interruptMask |= mask; |
| 155 | if (!interruptMode) |
| 156 | interruptMode = 1; |
| 157 | SREG = sreg; |
| 158 | } |
| 159 | |
| 160 | void SPIClass::notUsingInterrupt(uint8_t interruptNumber) |
| 161 | { |
nothing calls this directly
no outgoing calls
no test coverage detected