| 58 | } |
| 59 | |
| 60 | bool RFM69::initialize(uint8_t freqBand, uint16_t nodeID, uint8_t networkID) { |
| 61 | _interruptNum = digitalPinToInterrupt(_interruptPin); |
| 62 | if (_interruptNum == (uint8_t)NOT_AN_INTERRUPT) return false; |
| 63 | #ifdef RF69_ATTACHINTERRUPT_TAKES_PIN_NUMBER |
| 64 | _interruptNum = _interruptPin; |
| 65 | #endif |
| 66 | const uint8_t CONFIG[][2] = { |
| 67 | /* 0x01 */ { REG_OPMODE, RF_OPMODE_SEQUENCER_ON | RF_OPMODE_LISTEN_OFF | RF_OPMODE_STANDBY }, |
| 68 | /* 0x02 */ { REG_DATAMODUL, RF_DATAMODUL_DATAMODE_PACKET | RF_DATAMODUL_MODULATIONTYPE_FSK | RF_DATAMODUL_MODULATIONSHAPING_00 }, // no shaping |
| 69 | /* 0x03 */ { REG_BITRATEMSB, RF_BITRATEMSB_55555}, // default: 4.8 KBPS |
| 70 | /* 0x04 */ { REG_BITRATELSB, RF_BITRATELSB_55555}, |
| 71 | /* 0x05 */ { REG_FDEVMSB, RF_FDEVMSB_50000}, // default: 5KHz, (FDEV+(BitRate/2)<=500KHz) |
| 72 | /* 0x06 */ { REG_FDEVLSB, RF_FDEVLSB_50000}, |
| 73 | |
| 74 | /* 0x07 */ { REG_FRFMSB, (uint8_t) (freqBand==RF69_315MHZ ? RF_FRFMSB_315 : (freqBand==RF69_433MHZ ? RF_FRFMSB_433_92 : (freqBand==RF69_868MHZ ? RF_FRFMSB_868 : RF_FRFMSB_915))) }, |
| 75 | /* 0x08 */ { REG_FRFMID, (uint8_t) (freqBand==RF69_315MHZ ? RF_FRFMID_315 : (freqBand==RF69_433MHZ ? RF_FRFMID_433_92 : (freqBand==RF69_868MHZ ? RF_FRFMID_868 : RF_FRFMID_915))) }, |
| 76 | /* 0x09 */ { REG_FRFLSB, (uint8_t) (freqBand==RF69_315MHZ ? RF_FRFLSB_315 : (freqBand==RF69_433MHZ ? RF_FRFLSB_433_92 : (freqBand==RF69_868MHZ ? RF_FRFLSB_868 : RF_FRFLSB_915))) }, |
| 77 | |
| 78 | // looks like PA1 and PA2 are not implemented on RFM69W/CW, hence the max output power is 13dBm |
| 79 | // +17dBm and +20dBm are possible on RFM69HW |
| 80 | // +13dBm formula: Pout = -18 + OutputPower (with PA0 or PA1**) |
| 81 | // +17dBm formula: Pout = -14 + OutputPower (with PA1 and PA2)** |
| 82 | // +20dBm formula: Pout = -11 + OutputPower (with PA1 and PA2)** and high power PA settings (section 3.3.7 in datasheet) |
| 83 | ///* 0x11 */ { REG_PALEVEL, RF_PALEVEL_PA0_ON | RF_PALEVEL_PA1_OFF | RF_PALEVEL_PA2_OFF | RF_PALEVEL_OUTPUTPOWER_11111}, |
| 84 | ///* 0x13 */ { REG_OCP, RF_OCP_ON | RF_OCP_TRIM_95 }, // over current protection (default is 95mA) |
| 85 | |
| 86 | // RXBW defaults are { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_24 | RF_RXBW_EXP_5} (RxBw: 10.4KHz) |
| 87 | /* 0x19 */ { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_16 | RF_RXBW_EXP_2 }, // (BitRate < 2 * RxBw) |
| 88 | //for BR-19200: /* 0x19 */ { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_24 | RF_RXBW_EXP_3 }, |
| 89 | /* 0x25 */ { REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01 }, // DIO0 is the only IRQ we're using |
| 90 | /* 0x26 */ { REG_DIOMAPPING2, RF_DIOMAPPING2_CLKOUT_OFF }, // DIO5 ClkOut disable for power saving |
| 91 | /* 0x28 */ { REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN }, // writing to this bit ensures that the FIFO & status flags are reset |
| 92 | /* 0x29 */ { REG_RSSITHRESH, 220 }, // must be set to dBm = (-Sensitivity / 2), default is 0xE4 = 228 so -114dBm |
| 93 | ///* 0x2D */ { REG_PREAMBLELSB, RF_PREAMBLESIZE_LSB_VALUE } // default 3 preamble bytes 0xAAAAAA |
| 94 | /* 0x2E */ { REG_SYNCCONFIG, RF_SYNC_ON | RF_SYNC_FIFOFILL_AUTO | RF_SYNC_SIZE_2 | RF_SYNC_TOL_0 }, |
| 95 | /* 0x2F */ { REG_SYNCVALUE1, 0x2D }, // attempt to make this compatible with sync1 byte of RFM12B lib |
| 96 | /* 0x30 */ { REG_SYNCVALUE2, networkID }, // NETWORK ID |
| 97 | //* 0x31 */ { REG_SYNCVALUE3, 0xAA }, |
| 98 | //* 0x31 */ { REG_SYNCVALUE4, 0xBB }, |
| 99 | /* 0x37 */ { REG_PACKETCONFIG1, RF_PACKET1_FORMAT_VARIABLE | RF_PACKET1_DCFREE_OFF | RF_PACKET1_CRC_ON | RF_PACKET1_CRCAUTOCLEAR_ON | RF_PACKET1_ADRSFILTERING_OFF }, |
| 100 | /* 0x38 */ { REG_PAYLOADLENGTH, 66 }, // in variable length mode: the max frame size, not used in TX |
| 101 | ///* 0x39 */ { REG_NODEADRS, nodeID }, // turned off because we're not using address filtering |
| 102 | /* 0x3C */ { REG_FIFOTHRESH, RF_FIFOTHRESH_TXSTART_FIFONOTEMPTY | RF_FIFOTHRESH_VALUE }, // TX on FIFO not empty |
| 103 | /* 0x3D */ { REG_PACKETCONFIG2, RF_PACKET2_RXRESTARTDELAY_2BITS | RF_PACKET2_AUTORXRESTART_OFF | RF_PACKET2_AES_OFF }, // RXRESTARTDELAY must match transmitter PA ramp-down time (bitrate dependent) |
| 104 | //for BR-19200: /* 0x3D */ { REG_PACKETCONFIG2, RF_PACKET2_RXRESTARTDELAY_NONE | RF_PACKET2_AUTORXRESTART_ON | RF_PACKET2_AES_OFF }, // RXRESTARTDELAY must match transmitter PA ramp-down time (bitrate dependent) |
| 105 | /* 0x6F */ { REG_TESTDAGC, RF_DAGC_IMPROVED_LOWBETA0 }, // run DAGC continuously in RX mode for Fading Margin Improvement, recommended default for AfcLowBetaOn=0 |
| 106 | {255, 0} |
| 107 | }; |
| 108 | |
| 109 | digitalWrite(_slaveSelectPin, HIGH); |
| 110 | pinMode(_slaveSelectPin, OUTPUT); |
| 111 | if (_spi == nullptr) { |
| 112 | _spi = &SPI; |
| 113 | } |
| 114 | _spi->begin(); |
| 115 | |
| 116 | #ifdef SPI_HAS_TRANSACTION |
| 117 | _settings = SPISettings(8000000, MSBFIRST, SPI_MODE0); |
nothing calls this directly
no outgoing calls
no test coverage detected