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hub / github.com/LPC4/Full-Stack / handle_ecall

Method handle_ecall

crates/virtual-machine/src/cpu/pipeline.rs:793–803  ·  view source on GitHub ↗
(&mut self, _bus: &mut SystemBus)

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791 PrivilegeMode::Machine => traps::CAUSE_ECALL_M,
792 };
793 self.take_trap(cause, 0, ecall_pc);
794 self.flush_pipeline();
795 Ok(TickOutcome::EcallSquash)
796 }
797
798 // Returns Some((cause, tval, pc)) when an interrupt is ready to fire right now.
799 // Priority order per spec: MEI(11) > MSI(3) > MTI(7), then SEI(9) > SSI(1) > STI(5).
800 fn check_pending_interrupt(&self) -> Option<(u64, u64, u64)> {
801 let pending = self.csrs.mip & self.csrs.mie;
802 if pending == 0 {
803 return None;
804 }
805
806 let in_m = self.regs.priv_mode == PrivilegeMode::Machine;

Callers 1

stage_wbMethod · 0.80

Calls 2

take_trapMethod · 0.80
flush_pipelineMethod · 0.80

Tested by

no test coverage detected