Parse `"rd, rs1, imm"` -> (`rd_reg`, `rs1_reg`, `imm_i32`).
(operands: &str)
| 452 | return out; |
| 453 | } |
| 454 | |
| 455 | if (-2_147_483_648..=2_147_483_647).contains(&imm) { |
| 456 | load32(rd, imm as i32, &mut out); |
| 457 | return out; |
| 458 | } |
| 459 | |
| 460 | // 64-bit: split into high32 and low32, combine with shifts. |
| 461 | // Uses t1 (x6) as a temporary for the high half. |
| 462 | const T1: u8 = 6; |
| 463 | let low32 = (imm & 0xFFFF_FFFF) as i32; |
no test coverage detected