| 589 | } |
| 590 | |
| 591 | int |
| 592 | ars_get_position(ROT *rot, azimuth_t *az, elevation_t *el) |
| 593 | { |
| 594 | const struct ars_priv_data *priv = (struct ars_priv_data *)ROTSTATE(rot)->priv; |
| 595 | struct rot_state *rs = ROTSTATE(rot); |
| 596 | hamlib_port_t *pport = ROTPORT(rot); |
| 597 | int i, num_sample; |
| 598 | unsigned az_samples[NUM_SAMPLES], az_value; |
| 599 | unsigned el_samples[NUM_SAMPLES], el_value; |
| 600 | unsigned char status; |
| 601 | |
| 602 | par_lock(pport); |
| 603 | |
| 604 | /* flush last sampled value, with a dummy read */ |
| 605 | CHKPPRET(ars_clear_ctrl_pin(rot, CTL_PIN_CLK)); |
| 606 | hl_usleep(PP_IO_PERIOD); |
| 607 | |
| 608 | CHKPPRET(ars_clear_ctrl_pin(rot, CTL_PIN_CS)); |
| 609 | hl_usleep(PP_IO_PERIOD); |
| 610 | |
| 611 | for (i = 0; i < priv->adc_res; i++) |
| 612 | { |
| 613 | CHKPPRET(ars_set_ctrl_pin(rot, CTL_PIN_CLK)); |
| 614 | hl_usleep(PP_IO_PERIOD); |
| 615 | |
| 616 | CHKPPRET(ars_clear_ctrl_pin(rot, CTL_PIN_CLK)); |
| 617 | hl_usleep(PP_IO_PERIOD); |
| 618 | } |
| 619 | |
| 620 | CHKPPRET(ars_clear_ctrl_pin(rot, CTL_PIN_CLK)); |
| 621 | hl_usleep(PP_IO_PERIOD); |
| 622 | |
| 623 | CHKPPRET(ars_set_ctrl_pin(rot, CTL_PIN_CS)); |
| 624 | /* end of dummy read */ |
| 625 | |
| 626 | for (num_sample = 0; num_sample < NUM_SAMPLES; num_sample++) |
| 627 | { |
| 628 | |
| 629 | /* read ADC value TLC(1)549 (8/10 bits), by SPI bitbanging */ |
| 630 | |
| 631 | hl_usleep(PP_IO_PERIOD); |
| 632 | CHKPPRET(ars_clear_ctrl_pin(rot, CTL_PIN_CLK)); |
| 633 | hl_usleep(PP_IO_PERIOD); |
| 634 | |
| 635 | CHKPPRET(ars_clear_ctrl_pin(rot, CTL_PIN_CS)); |
| 636 | hl_usleep(PP_IO_PERIOD); |
| 637 | |
| 638 | az_samples[num_sample] = 0; |
| 639 | el_samples[num_sample] = 0; |
| 640 | |
| 641 | for (i = 0; i < priv->adc_res; i++) |
| 642 | { |
| 643 | CHKPPRET(ars_set_ctrl_pin(rot, CTL_PIN_CLK)); |
| 644 | hl_usleep(PP_IO_PERIOD); |
| 645 | |
| 646 | CHKPPRET(par_read_status(pport, &status)); |
| 647 | |
| 648 | az_samples[num_sample] <<= 1; |
no test coverage detected