| 134 | } |
| 135 | |
| 136 | void SPIBusManager::transmit(SPIBusHandle handle, const u8* data, size_t length) FL_NOEXCEPT { |
| 137 | if (!handle.is_valid || handle.bus_id >= mNumBuses) { |
| 138 | return; |
| 139 | } |
| 140 | |
| 141 | SPIBusInfo& bus = mBuses[handle.bus_id]; |
| 142 | if (!bus.is_initialized) { |
| 143 | return; |
| 144 | } |
| 145 | |
| 146 | // Check if device is enabled |
| 147 | if (handle.lane_id >= bus.num_devices || !bus.devices[handle.lane_id].is_enabled) { |
| 148 | return; // Silently skip disabled devices |
| 149 | } |
| 150 | |
| 151 | // Route to appropriate backend |
| 152 | switch (bus.bus_type) { |
| 153 | case SPIBusType::SINGLE_SPI: { |
| 154 | // Single SPI uses direct hardware writes (handled by proxy) |
| 155 | // No buffering needed - proxy writes directly to ESP32SPIOutput |
| 156 | break; |
| 157 | } |
| 158 | |
| 159 | case SPIBusType::DUAL_SPI: { |
| 160 | // Buffer data for this lane - will be interleaved in finalizeTransmission() |
| 161 | // Ensure lane_buffers is sized correctly |
| 162 | if (bus.lane_buffers.size() <= handle.lane_id) { |
| 163 | bus.lane_buffers.resize(handle.lane_id + 1); |
| 164 | } |
| 165 | |
| 166 | // Append data to this lane's buffer |
| 167 | fl::vector<u8>& lane_buffer = bus.lane_buffers[handle.lane_id]; |
| 168 | for (size_t i = 0; i < length; i++) { |
| 169 | lane_buffer.push_back(data[i]); |
| 170 | } |
| 171 | break; |
| 172 | } |
| 173 | |
| 174 | case SPIBusType::QUAD_SPI: |
| 175 | case SPIBusType::OCTO_SPI: |
| 176 | case SPIBusType::HEXADECA_SPI: { |
| 177 | // Buffer data for this lane - will be interleaved in finalizeTransmission() |
| 178 | // Ensure lane_buffers is sized correctly |
| 179 | if (bus.lane_buffers.size() <= handle.lane_id) { |
| 180 | bus.lane_buffers.resize(handle.lane_id + 1); |
| 181 | } |
| 182 | |
| 183 | // Append data to this lane's buffer |
| 184 | fl::vector<u8>& lane_buffer = bus.lane_buffers[handle.lane_id]; |
| 185 | for (size_t i = 0; i < length; i++) { |
| 186 | lane_buffer.push_back(data[i]); |
| 187 | } |
| 188 | break; |
| 189 | } |
| 190 | |
| 191 | case SPIBusType::SOFT_SPI: { |
| 192 | // Software SPI fallback implementation |
| 193 | // Note: This requires Pin class to be available, which depends on platform-specific |
no test coverage detected