Function attach_external_handler

src/platforms/arm/samd/isr_samd.hpp:525–657

}

int attach_external_handler(u8 pin, const isr_config_t& config, isr_handle_t* out_handle) FL_NOEXCEPT {
    if (!config.handler) {
        FL_WARN("attachExternalHandler: handler is null");
        return -1;  // Invalid parameter
    }

    // Allocate an EIC channel
    u8 eic_ch = 0;
    if (!allocate_eic_channel(eic_ch)) {
        FL_WARN("attachExternalHandler: no free EIC channels");
        return -3;  // Out of resources
    }

    // Allocate handle data
    auto handle_owner = fl::make_unique<samd_isr_handle_data>();
    auto* handle_data = handle_owner.get();
    if (!handle_data) {
        free_eic_channel(eic_ch);
        FL_WARN("attachExternalHandler: failed to allocate handle data");
        return -5;  // Out of memory
    }

    handle_data->is_timer = false;
    handle_data->eic_channel = eic_ch;
    handle_data->gpio_pin = pin;
    handle_data->user_handler = config.handler;
    handle_data->user_data = config.user_data;

    // Store handle for ISR access
    eic_handles[eic_ch] = handle_data;

    // Enable EIC clock
#if defined(FL_IS_SAMD21)
    GCLK->CLKCTRL.reg = (u16)(GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID_EIC);
    while (GCLK->STATUS.bit.SYNCBUSY) {
        // Wait for sync
    }
#elif defined(FL_IS_SAMD51)
    GCLK->PCHCTRL[EIC_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK0 | GCLK_PCHCTRL_CHEN;
    while (!(GCLK->PCHCTRL[EIC_GCLK_ID].reg & GCLK_PCHCTRL_CHEN)) {
        // Wait for enable
    }
#endif

    // Configure GPIO pin for EIC function
    // Note: Pin-to-EIC-channel mapping is board-specific
    // For now, we use a simple mapping (this may need board-specific adjustments)
    u8 port = pin / 32;
    u8 pin_num = pin % 32;

    PORT->Group[port].PINCFG[pin_num].reg |= PORT_PINCFG_PMUXEN;

    // Set PMUX to function A (EIC) for the pin
    if (pin_num & 1) {
        PORT->Group[port].PMUX[pin_num >> 1].reg |= PORT_PMUX_PMUXO_A;
    } else {
        PORT->Group[port].PMUX[pin_num >> 1].reg |= PORT_PMUX_PMUXE_A;
    }