| 380 | } |
| 381 | |
| 382 | inline void transpose_8lane_inline( |
| 383 | const u8* const lanes[8], |
| 384 | u8* output, |
| 385 | size_t num_bytes |
| 386 | ) FL_NOEXCEPT { |
| 387 | for (size_t byte_idx = 0; byte_idx < num_bytes; byte_idx++) { |
| 388 | // Pack 8 bytes into a single 64-bit register |
| 389 | // This reduces register pressure and enables parallel bit extraction |
| 390 | u64 packed = |
| 391 | ((u64)lanes[0][byte_idx] << 0) | |
| 392 | ((u64)lanes[1][byte_idx] << 8) | |
| 393 | ((u64)lanes[2][byte_idx] << 16) | |
| 394 | ((u64)lanes[3][byte_idx] << 24) | |
| 395 | ((u64)lanes[4][byte_idx] << 32) | |
| 396 | ((u64)lanes[5][byte_idx] << 40) | |
| 397 | ((u64)lanes[6][byte_idx] << 48) | |
| 398 | ((u64)lanes[7][byte_idx] << 56); |
| 399 | |
| 400 | u8* dest = &output[byte_idx * 8]; |
| 401 | |
| 402 | // Extract bits in parallel (compiler can optimize independent shifts) |
| 403 | for (int bit = 7; bit >= 0; bit--) { |
| 404 | dest[7 - bit] = |
| 405 | ((packed >> (bit + 0)) & 0x01) << 0 | |
| 406 | ((packed >> (bit + 8)) & 0x01) << 1 | |
| 407 | ((packed >> (bit + 16)) & 0x01) << 2 | |
| 408 | ((packed >> (bit + 24)) & 0x01) << 3 | |
| 409 | ((packed >> (bit + 32)) & 0x01) << 4 | |
| 410 | ((packed >> (bit + 40)) & 0x01) << 5 | |
| 411 | ((packed >> (bit + 48)) & 0x01) << 6 | |
| 412 | ((packed >> (bit + 56)) & 0x01) << 7; |
| 413 | } |
| 414 | } |
| 415 | } |
| 416 | |
| 417 | inline void transpose_16lane_inline( |
| 418 | const u8* const lanes[16], |