| 96 | } |
| 97 | |
| 98 | void *av_malloc(size_t size) |
| 99 | { |
| 100 | void *ptr = NULL; |
| 101 | |
| 102 | if (size > atomic_load_explicit(&max_alloc_size, memory_order_relaxed)) |
| 103 | return NULL; |
| 104 | |
| 105 | #if HAVE_POSIX_MEMALIGN |
| 106 | if (size) //OS X on SDK 10.6 has a broken posix_memalign implementation |
| 107 | if (posix_memalign(&ptr, ALIGN, size)) |
| 108 | ptr = NULL; |
| 109 | #elif HAVE_ALIGNED_MALLOC |
| 110 | ptr = _aligned_malloc(size, ALIGN); |
| 111 | #elif HAVE_MEMALIGN |
| 112 | #ifndef __DJGPP__ |
| 113 | ptr = memalign(ALIGN, size); |
| 114 | #else |
| 115 | ptr = memalign(size, ALIGN); |
| 116 | #endif |
| 117 | /* Why 64? |
| 118 | * Indeed, we should align it: |
| 119 | * on 4 for 386 |
| 120 | * on 16 for 486 |
| 121 | * on 32 for 586, PPro - K6-III |
| 122 | * on 64 for K7 (maybe for P3 too). |
| 123 | * Because L1 and L2 caches are aligned on those values. |
| 124 | * But I don't want to code such logic here! |
| 125 | */ |
| 126 | /* Why 32? |
| 127 | * For AVX ASM. SSE / NEON needs only 16. |
| 128 | * Why not larger? Because I did not see a difference in benchmarks ... |
| 129 | */ |
| 130 | /* benchmarks with P3 |
| 131 | * memalign(64) + 1 3071, 3051, 3032 |
| 132 | * memalign(64) + 2 3051, 3032, 3041 |
| 133 | * memalign(64) + 4 2911, 2896, 2915 |
| 134 | * memalign(64) + 8 2545, 2554, 2550 |
| 135 | * memalign(64) + 16 2543, 2572, 2563 |
| 136 | * memalign(64) + 32 2546, 2545, 2571 |
| 137 | * memalign(64) + 64 2570, 2533, 2558 |
| 138 | * |
| 139 | * BTW, malloc seems to do 8-byte alignment by default here. |
| 140 | */ |
| 141 | #else |
| 142 | ptr = malloc(size); |
| 143 | #endif |
| 144 | if(!ptr && !size) { |
| 145 | size = 1; |
| 146 | ptr= av_malloc(1); |
| 147 | } |
| 148 | #if CONFIG_MEMORY_POISONING |
| 149 | if (ptr) |
| 150 | memset(ptr, FF_MEMORY_POISON, size); |
| 151 | #endif |
| 152 | return ptr; |
| 153 | } |
| 154 | |
| 155 | void *av_realloc(void *ptr, size_t size) |
no outgoing calls