| 2817 | } |
| 2818 | |
| 2819 | void OpDispatchBuilder::DAAOp(OpcodeArgs) { |
| 2820 | CalculateDeferredFlags(); |
| 2821 | auto AL = LoadGPRRegister(X86State::REG_RAX, OpSize::i8Bit); |
| 2822 | auto CFInv = GetRFLAG(FEXCore::X86State::RFLAG_CF_RAW_LOC, true); |
| 2823 | auto AF = CalculateAFForDecimal(AL); |
| 2824 | |
| 2825 | // CF |= (AL > 0x99); |
| 2826 | CFInv = _And(OpSize::i64Bit, CFInv, Select01(OpSize::i64Bit, CondClassType {COND_ULE}, AL, Constant(0x99))); |
| 2827 | |
| 2828 | // AL = AF ? (AL + 0x6) : AL; |
| 2829 | AL = _Select(FEXCore::IR::COND_NEQ, AF, Constant(0), Add(OpSize::i64Bit, AL, 0x6), AL); |
| 2830 | |
| 2831 | // AL = CF ? (AL + 0x60) : AL; |
| 2832 | AL = _Select(FEXCore::IR::COND_EQ, CFInv, Constant(0), Add(OpSize::i64Bit, AL, 0x60), AL); |
| 2833 | |
| 2834 | // SF, ZF, PF set according to result. CF set per above. OF undefined. |
| 2835 | StoreGPRRegister(X86State::REG_RAX, AL, OpSize::i8Bit); |
| 2836 | SetNZ_ZeroCV(OpSize::i8Bit, AL); |
| 2837 | SetCFInverted(CFInv); |
| 2838 | CalculatePF(AL); |
| 2839 | SetAFAndFixup(AF); |
| 2840 | } |
| 2841 | |
| 2842 | void OpDispatchBuilder::DASOp(OpcodeArgs) { |
| 2843 | CalculateDeferredFlags(); |
nothing calls this directly
no outgoing calls
no test coverage detected