| 440 | } |
| 441 | |
| 442 | inline bool KillMove(IROp_Header* LastOp, IROp_Header* IROp, Ref LastNode, Ref CodeNode) { |
| 443 | // 32-bit moves in x86_64 are represented as a Bfe, detect them. |
| 444 | if (LastOp->Op == OP_BFE && LastOp->C<IR::IROp_Bfe>()->lsb == 0 && LastOp->C<IR::IROp_Bfe>()->Width == 32) { |
| 445 | auto Op = IROp->Op; |
| 446 | |
| 447 | if (Op == OP_AND) { |
| 448 | // Rewrite "mov wA, wB; and xA, xA, xC" into "and wA, wB, wC", since |
| 449 | // ((b & 0xffffffff) & c) == (b & c) & 0xffffffff. |
| 450 | IROp->Size = OpSize::i32Bit; |
| 451 | return true; |
| 452 | } else if (IROp->Size == OpSize::i32Bit) { |
| 453 | return Op == OP_OR || Op == OP_XOR || Op == OP_AND || Op == OP_SUB || Op == OP_LSHL || Op == OP_LSHR || Op == OP_ASHR; |
| 454 | } |
| 455 | } |
| 456 | |
| 457 | return LastOp->Op == OP_STOREREGISTER; |
| 458 | } |
| 459 | |
| 460 | inline bool IsSignext(const IROp_Header* IROp, OrderedNodeWrapper Src, OpSize Size) { |
| 461 | if (IROp->Op == OP_SBFE) { |