| 288 | } |
| 289 | |
| 290 | void |
| 291 | tlb_update(struct pmap *pmap, vm_offset_t va, pt_entry_t pte) |
| 292 | { |
| 293 | register_t asid; |
| 294 | register_t s; |
| 295 | int i; |
| 296 | |
| 297 | va &= ~PAGE_MASK; |
| 298 | pte &= ~TLBLO_SWBITS_MASK; |
| 299 | |
| 300 | s = intr_disable(); |
| 301 | asid = mips_rd_entryhi() & TLBHI_ASID_MASK; |
| 302 | |
| 303 | mips_wr_pagemask(0); |
| 304 | mips_wr_entryhi(TLBHI_ENTRY(va, pmap_asid(pmap))); |
| 305 | tlb_probe(); |
| 306 | i = mips_rd_index(); |
| 307 | if (i >= 0) { |
| 308 | tlb_read(); |
| 309 | |
| 310 | if ((va & PAGE_SIZE) == 0) { |
| 311 | mips_wr_entrylo0(pte); |
| 312 | } else { |
| 313 | mips_wr_entrylo1(pte); |
| 314 | } |
| 315 | tlb_write_indexed(); |
| 316 | } |
| 317 | |
| 318 | mips_wr_entryhi(asid); |
| 319 | intr_restore(s); |
| 320 | } |
| 321 | |
| 322 | static void |
| 323 | tlb_invalidate_one(unsigned i) |
no test coverage detected