| 1168 | } |
| 1169 | |
| 1170 | static int |
| 1171 | mtk_pcie_phy_rt3883_init(device_t dev) |
| 1172 | { |
| 1173 | struct mtk_pci_softc *sc = device_get_softc(dev); |
| 1174 | |
| 1175 | /* Enable PCI host mode and PCIe RC mode */ |
| 1176 | mtk_sysctl_clr_set(SYSCTL_SYSCFG1, 0, RT3883_PCI_HOST_MODE | |
| 1177 | RT3883_PCIE_RC_MODE); |
| 1178 | |
| 1179 | /* Enable PCIe PHY */ |
| 1180 | if (mtk_pcie_phy_start(dev)) |
| 1181 | return (ENXIO); |
| 1182 | |
| 1183 | /* Disable PCI, we only support PCIe for now */ |
| 1184 | mtk_sysctl_clr_set(SYSCTL_RSTCTRL, 0, RT3883_PCI_RST); |
| 1185 | mtk_sysctl_clr_set(SYSCTL_CLKCFG1, RT3883_PCI_CLK, 0); |
| 1186 | |
| 1187 | /* Give things a chance to sink in */ |
| 1188 | DELAY(500000); |
| 1189 | |
| 1190 | /* Set PCIe port number to 0 and lift PCIe reset */ |
| 1191 | MT_WRITE32(sc, MTK_PCI_PCICFG, 0); |
| 1192 | |
| 1193 | /* Configure PCI Arbiter */ |
| 1194 | MT_WRITE32(sc, MTK_PCI_ARBCTL, 0x79); |
| 1195 | |
| 1196 | /* We have a single PCIe slot */ |
| 1197 | sc->num_slots = 1; |
| 1198 | |
| 1199 | return (0); |
| 1200 | } |
| 1201 | |
| 1202 | static void |
| 1203 | mtk_pcie_phy_setup_slots(device_t dev) |
no test coverage detected