| 162 | } |
| 163 | |
| 164 | static int |
| 165 | mtk_pic_attach(device_t dev) |
| 166 | { |
| 167 | struct mtk_pic_softc *sc; |
| 168 | intptr_t xref = pic_xref(dev); |
| 169 | |
| 170 | sc = device_get_softc(dev); |
| 171 | |
| 172 | if (bus_alloc_resources(dev, mtk_pic_spec, sc->pic_res)) { |
| 173 | device_printf(dev, "could not allocate resources\n"); |
| 174 | return (ENXIO); |
| 175 | } |
| 176 | |
| 177 | sc->pic_dev = dev; |
| 178 | |
| 179 | /* Initialize mutex */ |
| 180 | mtx_init(&sc->mutex, "PIC lock", "", MTX_SPIN); |
| 181 | |
| 182 | /* Set the number of interrupts */ |
| 183 | sc->nirqs = nitems(sc->pic_irqs); |
| 184 | |
| 185 | /* Mask all interrupts */ |
| 186 | WRITE4(sc, MTK_INTDIS, 0x7FFFFFFF); |
| 187 | |
| 188 | /* But enable interrupt generation/masking */ |
| 189 | WRITE4(sc, MTK_INTENA, 0x80000000); |
| 190 | |
| 191 | /* Set all interrupts to type 0 */ |
| 192 | WRITE4(sc, MTK_INTTYPE, 0x00000000); |
| 193 | |
| 194 | /* Register the interrupts */ |
| 195 | if (mtk_pic_register_isrcs(sc) != 0) { |
| 196 | device_printf(dev, "could not register PIC ISRCs\n"); |
| 197 | goto cleanup; |
| 198 | } |
| 199 | |
| 200 | /* |
| 201 | * Now, when everything is initialized, it's right time to |
| 202 | * register interrupt controller to interrupt framefork. |
| 203 | */ |
| 204 | if (intr_pic_register(dev, xref) == NULL) { |
| 205 | device_printf(dev, "could not register PIC\n"); |
| 206 | goto cleanup; |
| 207 | } |
| 208 | |
| 209 | if (bus_setup_intr(dev, sc->pic_res[1], INTR_TYPE_CLK, |
| 210 | mtk_pic_intr, NULL, sc, &sc->pic_intrhand)) { |
| 211 | device_printf(dev, "could not setup irq handler\n"); |
| 212 | intr_pic_deregister(dev, xref); |
| 213 | goto cleanup; |
| 214 | } |
| 215 | return (0); |
| 216 | |
| 217 | cleanup: |
| 218 | bus_release_resources(dev, mtk_pic_spec, sc->pic_res); |
| 219 | return(ENXIO); |
| 220 | } |
| 221 |
nothing calls this directly
no test coverage detected