| 69 | */ |
| 70 | |
| 71 | static __inline void |
| 72 | mips_barrier(void) |
| 73 | { |
| 74 | #if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM) |
| 75 | __compiler_membar(); |
| 76 | #else |
| 77 | __asm __volatile (".set noreorder\n\t" |
| 78 | "nop\n\t" |
| 79 | "nop\n\t" |
| 80 | "nop\n\t" |
| 81 | "nop\n\t" |
| 82 | "nop\n\t" |
| 83 | "nop\n\t" |
| 84 | "nop\n\t" |
| 85 | "nop\n\t" |
| 86 | ".set reorder\n\t" |
| 87 | : : : "memory"); |
| 88 | #endif |
| 89 | } |
| 90 | |
| 91 | static __inline void |
| 92 | mips_cp0_sync(void) |