| 79 | } |
| 80 | |
| 81 | void |
| 82 | platform_init_ap(int cpuid) |
| 83 | { |
| 84 | unsigned ciu_int_mask, clock_int_mask, ipi_int_mask; |
| 85 | |
| 86 | /* |
| 87 | * Set the exception base. |
| 88 | */ |
| 89 | mips_wr_ebase(0x80000000); |
| 90 | |
| 91 | /* |
| 92 | * Clear any pending IPIs. |
| 93 | */ |
| 94 | cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cpuid), 0xffffffff); |
| 95 | |
| 96 | /* |
| 97 | * Set up interrupts. |
| 98 | */ |
| 99 | octeon_ciu_reset(); |
| 100 | |
| 101 | /* |
| 102 | * Unmask the clock, ipi and ciu interrupts. |
| 103 | */ |
| 104 | ciu_int_mask = hard_int_mask(0); |
| 105 | clock_int_mask = hard_int_mask(5); |
| 106 | ipi_int_mask = hard_int_mask(platform_ipi_hardintr_num()); |
| 107 | set_intr_mask(ciu_int_mask | clock_int_mask | ipi_int_mask); |
| 108 | |
| 109 | mips_wbflush(); |
| 110 | } |
| 111 | |
| 112 | void |
| 113 | platform_cpu_mask(cpuset_t *mask) |
nothing calls this directly
no test coverage detected