Backplane clock frequency (in Hz) */
| 252 | |
| 253 | /** Backplane clock frequency (in Hz) */ |
| 254 | uint64_t |
| 255 | bcm_get_sifreq(struct bcm_platform *bp) |
| 256 | { |
| 257 | uint32_t fixed_hz; |
| 258 | uint32_t n, m; |
| 259 | bus_size_t mreg; |
| 260 | uint8_t pll_type; |
| 261 | |
| 262 | /* PMU support */ |
| 263 | if (bcm_has_pmu(bp)) |
| 264 | return (bhnd_pmu_si_clock(bcm_get_pmu(bp))); |
| 265 | |
| 266 | /* |
| 267 | * PWRCTL support |
| 268 | */ |
| 269 | pll_type = CHIPC_GET_BITS(bp->cc_caps, CHIPC_CAP_PLL); |
| 270 | mreg = bhnd_pwrctl_si_clkreg_m(&bp->cid, pll_type, &fixed_hz); |
| 271 | if (mreg == 0) |
| 272 | return (fixed_hz); |
| 273 | |
| 274 | n = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_N); |
| 275 | m = BCM_CHIPC_READ_4(bp, mreg); |
| 276 | |
| 277 | return (bhnd_pwrctl_si_clock_rate(&bp->cid, pll_type, n, m)); |
| 278 | } |
| 279 | |
| 280 | static uint32_t |
| 281 | bcm_pmu_read4(bus_size_t reg, void *ctx) { |
no test coverage detected