* Encapsulate an mbuf chain in a descriptor by coupling the mbuf data * pointers to the fragment pointers. */
| 1559 | * pointers to the fragment pointers. |
| 1560 | */ |
| 1561 | static int |
| 1562 | arge_encap(struct arge_softc *sc, struct mbuf **m_head) |
| 1563 | { |
| 1564 | struct arge_txdesc *txd; |
| 1565 | struct arge_desc *desc, *prev_desc; |
| 1566 | bus_dma_segment_t txsegs[ARGE_MAXFRAGS]; |
| 1567 | int error, i, nsegs, prod, prev_prod; |
| 1568 | struct mbuf *m; |
| 1569 | |
| 1570 | ARGE_LOCK_ASSERT(sc); |
| 1571 | |
| 1572 | /* |
| 1573 | * Fix mbuf chain based on hardware alignment constraints. |
| 1574 | */ |
| 1575 | m = *m_head; |
| 1576 | if (! arge_mbuf_chain_is_tx_aligned(sc, m)) { |
| 1577 | sc->stats.tx_pkts_unaligned++; |
| 1578 | m = m_defrag(*m_head, M_NOWAIT); |
| 1579 | if (m == NULL) { |
| 1580 | m_freem(*m_head); |
| 1581 | *m_head = NULL; |
| 1582 | return (ENOBUFS); |
| 1583 | } |
| 1584 | *m_head = m; |
| 1585 | } else |
| 1586 | sc->stats.tx_pkts_aligned++; |
| 1587 | |
| 1588 | prod = sc->arge_cdata.arge_tx_prod; |
| 1589 | txd = &sc->arge_cdata.arge_txdesc[prod]; |
| 1590 | error = bus_dmamap_load_mbuf_sg(sc->arge_cdata.arge_tx_tag, |
| 1591 | txd->tx_dmamap, *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT); |
| 1592 | |
| 1593 | if (error == EFBIG) { |
| 1594 | panic("EFBIG"); |
| 1595 | } else if (error != 0) |
| 1596 | return (error); |
| 1597 | |
| 1598 | if (nsegs == 0) { |
| 1599 | m_freem(*m_head); |
| 1600 | *m_head = NULL; |
| 1601 | return (EIO); |
| 1602 | } |
| 1603 | |
| 1604 | /* Check number of available descriptors. */ |
| 1605 | if (sc->arge_cdata.arge_tx_cnt + nsegs >= (ARGE_TX_RING_COUNT - 2)) { |
| 1606 | bus_dmamap_unload(sc->arge_cdata.arge_tx_tag, txd->tx_dmamap); |
| 1607 | sc->stats.tx_pkts_nosegs++; |
| 1608 | return (ENOBUFS); |
| 1609 | } |
| 1610 | |
| 1611 | txd->tx_m = *m_head; |
| 1612 | bus_dmamap_sync(sc->arge_cdata.arge_tx_tag, txd->tx_dmamap, |
| 1613 | BUS_DMASYNC_PREWRITE); |
| 1614 | |
| 1615 | /* |
| 1616 | * Make a list of descriptors for this packet. DMA controller will |
| 1617 | * walk through it while arge_link is not zero. |
| 1618 | * |
no test coverage detected